Writing data using DMA by specifying a buffer address and a flash memory address
A storage device includes a buffer memory and a flash memory, which can be connected with the host computer communicably. A method for writing data into the storage device includes: receiving a first write command from the host, the first write command including the data to be written, the address for the flash memory and the address or the buffer memory; based on the address for the buffer memory, writing the data to be written to the buffer memory; based on the address for the flash memory, writing the data to be written to the flash memory.
1. A method of writing data to a storage device, wherein the storage device includes a buffer memory and a flash memory, and the storage device and an information processing device are communicably connected, the method comprising:
receiving, from the information processing device, a first DMA descriptor including an address of a memory location in the information processing device, an address of the flash memory, and an address of the buffer memory;
when the first DMA descriptor indicates a DMA write operation;
writing, by DMA transmission, first data from the address of the memory location in the information processing device to the buffer memory at the address of the buffer memory; and
writing the first data from the address of the buffer memory to the flash memory based on the address of the flash memory.
2. The method of claim 1 , wherein the first DMA descriptor includes a first DMA descriptor command and a first DMA descriptor data, wherein the first DMA descriptor data includes the address of the memory location in the information processing device and the address of the buffer memory, and the first DMA descriptor command includes the address of the flash memory;
the method further comprising:
converting the first DMA descriptor data into a first DMA microinstruction indicating the address of the flash memory, the address of the memory location in the information processing device and the address of the buffer memory;
wherein, when the first DMA microinstruction indicates the DMA write operation, based on the address of the memory location in the information processing device and the address of the buffer memory, the first data is written to the buffer memory from the information processing device by the DMA transmission; and
based on the address of the flash memory and the address of the buffer memory, the first data in the buffer memory is written to the flash memory.
3. The method of claim 1 , wherein the first DMA descriptor includes a first DMA descriptor command, a first DMA descriptor data and a second DMA descriptor data, the first DMA descriptor data includes a first address of a first memory location in the information processing device and a first address of the buffer memory, the second DMA descriptor data includes a second address of a second memory location in the information processing device and a second address of the buffer memory, wherein the first DMA descriptor command includes the address of the flash memory;
the method further comprising:
converting the first DMA descriptor data into a first DMA microinstruction, and converting the second DMA descriptor data into a second DMA microinstruction, wherein the first DMA microinstruction indicates the first addresses of the flash memory, the first addresses of the first memory location in the information processing device and the first addresses of the buffer memory, and the second microinstruction indicates the second address of the flash memory, the second address of the second memory location in the information processing device, and the second address of the buffer memory, wherein the second address of the flash memory and the first address of the flash memory are apart from each other at a predetermined offset value;
wherein, when the first DMA descriptor indicates the DMA write operation, based on the first address of the first memory location in the information processing device and the first address of the buffer memory, the first data is written to the buffer memory from the information processing device by DMA transmission;
when the second DMA descriptor indicates the DMA write operation, based on the second address of the second memory location in the information processing device and the second address of the buffer memory, the second data is written to the buffer memory from the information processing device by DMA transmission;
based on the first address of the flash memory and the first address of the buffer memory, the first data in the buffer memory is written to the flash memory; and
based on the second address of the flash memory and the second address of the buffer memory, the second data in the buffer memory is written to the flash memory.
4. The method of claim 1 , wherein:
after the first data is written to the flash memory, a message is sent to the information processing device, to indicate the releasing of the storage space of the buffer memory corresponding to the address of the buffer memory.
5. The method of claim 1 , wherein:
after the first data is written to the buffer memory, a message is sent to the information processing device, to indicate the completion of the first DMA descriptor operation.
6. The method of claim 3 , wherein:
after the first data and the second data are written to the flash memory, an interrupt is sent to the information processing device, to indicate that the memory space of the buffer memory corresponding to the first address of the buffer memory and the second address of the buffer memory is released.
7. The method of claim 3 , wherein:
when the first data and the second data are written to the buffer memory, a message is sent to the information processing device, to indicate the completion of the first DMA descriptor operation.
8. A storage device, including a buffer memory, a flash memory, an information processing device interface and a control circuit, is communicably connected with an information processing device, wherein:
the information processing device interface receives a first DMA descriptor from the information processing device, wherein the first DMA descriptor includes an address of a memory location in the information processing device, for an address of the flash memory, and an address of the buffer memory;
when the control circuit identifies the first DMA descriptor indicating a DMA write operation, the first data is written to the buffer memory at the address of the buffer memory from the address of the memory location in the information processing device by DMA transmission; and
the first data from the address of buffer memory is written to the flash memory based on the address of the flash memory by the control circuit.
9. A method for writing data to a storage device, wherein the storage device includes a buffer memory and a flash memory, and is communicably connected with an information processing device, the method comprising:
receiving, from the information processing device, a first write command including data to be written, an address of the flash memory and an address of the buffer memory;
in response to the first write command:
writing the data to be written to the buffer memory at the address of the buffer memory; and
writing the data to be written from the address of the buffer memory to the flash memory based on the address of the flash memory.
10. The method of claim 9 , wherein after writing the data to be written to the buffer memory, a message is sent to the information processing device, to indicate the completion of the first write command operation.
11. The method of claim 9 , wherein after writing the data to be written to the flash memory, a message is sent to the information processing device, to indicate the releasing of the storage space of the buffer memory corresponding to the address of the buffer memory.
12. The method of claim 9 , wherein after writing the data to be written to the flash memory, a message is sent to the information processing device, to indicate that the first write command operation is completed and the memory space of the buffer memory corresponding to the address used for the buffer memory is released.
13. A storage device, including a buffer memory, a flash memory, an information processing device interface, and a control circuit, is communicably connected with an information processing device, wherein:
the information processing device interface receives a write command from the information processing device, wherein the write command includes data to be written, an address of the flash memory, and an address of the buffer memory; wherein
the control circuit, in response to the write command:
writes the data to be written to the buffer memory at the address of the buffer memory; and
writes the data to be written from the address of the buffer memory to the flash memory based on the address of the flash memory.
14. The method of claim 2 , wherein:
after the first data is written to the flash memory, a message is sent to the information processing device, to indicate the releasing of the storage space of the buffer memory corresponding to the address of the buffer memory.
15. The method of claim 2 , wherein:
after the first data is written to the buffer memory, a message is sent to the information processing device, to indicate the completion of the first DMA descriptor operation.
16. The method of claim 4 , wherein:
after the first data is written to the buffer memory, a message is sent to the information processing device, to indicate the completion of the first DMA descriptor operation.
17. The method of claim 14 , wherein:
after the first data is written to the buffer memory, a message is sent to the information processing device, to indicate the completion of the first DMA descriptor operation.
18. The method of claim 6 , wherein:
when the first data and the second data are written to the buffer memory, a message is sent to the information processing device, to indicate the completion of the first DMA descriptor operation.
19. The method of claim 10 , wherein after writing the data to be written to the flash memory, a message is sent to the information processing device, to indicate the releasing of the storage space of the buffer memory corresponding to the address of the buffer memory.