IP Library Granted Patent US 9,438,537
Granted Patent B2
US 9,438,537 · App. 14/406,954 · Granted Sep 6, 2016

Method for cut through forwarding data packets between electronic communication devices

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Quick Facts
Patent No.
US 9,438,537
App. No.
14/406,954
Granted
Sep 6, 2016
Kind
B2
Abstract

An electronic device communicates according to a network protocol that defines data packets, for example EtherCAT. The device has a processor for performing input control on incoming data packets and performing output control on outgoing data packets, and a shared FIFO buffer comprising a multiuser memory. An input unit receives input data, detects the start of a respective data packet, subdivides the data packet into consecutive segments, one segment having a predetermined number of data bytes, and transfers the segment to the FIFO buffer before the next segment has been completely received. The processor accesses, in the input control, the multiuser memory for processing the segment, and, in the output control, initiates outputting the output packet before the corresponding input data packet has been completely received. An output unit transfers the segment from the FIFO buffer, and transmits the segment to the communication medium.

Claims (52)

1. An electronic device comprising:

a first input unit and a first output unit configured to communicate with other devices according to a network protocol via a communication medium, the network protocol defining data packets comprising data bytes having a predetermined structure including a packet header;

a first processor configured to perform input control on incoming data packets and perform output control on outgoing data packets;

a first in first out (FIFO) buffer comprising a multiuser memory, the input of the first FIFO buffer being coupled to the first input unit and the output of the first FIFO buffer being coupled to the first output unit, the first FIFO buffer being shared between the input control and the output control via the multiuser memory, wherein

the first input unit is arranged to

receive input data comprising incoming data packets from the communication medium,

detect the start of a respective data packet,

subdivide the data bytes of the respective data packet into consecutive segments, one segment having a predetermined number of data bytes, and

transfer the segment to the first FIFO buffer before the next segment has been completely received;

the first processor is arranged to

in the input control, access the multiuser memory for processing the segment, and

in the output control, initiate outputting the output packet before the corresponding input data packet has been completely received; and

the first output unit is arranged to

transfer the segment from the first FIFO buffer to the first output unit, and

transmit the segment to the communication medium.

2. The device as claimed in claim 1 , wherein

the first input unit is arranged to

prefix metadata to the segment, and

transfer the metadata with the segment to the first FIFO buffer; and

the first processor is arranged to process the metadata.

3. The device as claimed in claim 1 , wherein the incoming packets correspond to data on a Data Link layer according to an International Organization for Standardization (ISO) layer 2 network protocol.

4. The device as claimed in claim 1 , wherein the start of a respective data packet is after a preamble and Start of Frame Delimiter (SFD) on the physical layer according to an International Organization for Standardization (ISO) layer 1 network protocol.

5. The device as claimed in claim 1 , wherein the segments have a size of 8, 16 or 24 data bytes.

6. The device as claimed in claim 1 , wherein the first processor is a reduced instruction set computer (RISC) processor.

7. The device as claimed in claim 1 , wherein the input control comprises a receiver thread and the output control comprises a transmitter thread.

8. The device as claimed in claim 1 , wherein the first processor is arranged to convert a receive attribute of incoming data into a transmit attribute.

9. The device as claimed in claim 1 , wherein the first processor is arranged to change data bytes in a segment depending on a command in the data packet being processed.

10. The device as claimed in claim 9 , wherein the first processor is arranged to process a command that writes data from the incoming packet into a memory or register in the device by parsing and analyze the incoming packet, or a command that reads data from a register or memory in device by changing the data bytes in the outgoing packet.

11. The device as claimed in claim 1 , wherein the device comprises a hardware scheduler arranged to monitor activity of the first processor and pending requests from threads, and to assign a priority pending request to the first processor or round robin if multiple pending requests are the same priority.

12. The device as claimed in claim 1 , wherein the device is a slave node device.

13. The device as claimed in claim 1 , wherein the device has a second input unit, second output unit, second FIFO buffer coupled to the first processor, the second input unit, second output unit and second FIFO buffer being arranged equal to said first input unit, first output unit and first FIFO buffer.

14. The device as claimed in claim 1 , wherein the device has a second input unit and a second output unit, a second FIFO buffer and a second processor, the second input unit, second output unit, second FIFO buffer and second processor being arranged equal to said first input unit, first output unit, first FIFO buffer and first processor.

15. The device as claimed in claim 1 , wherein the device comprises a data handling unit, and the first processor is arranged to control transferring of segments of a data packet from the first FIFO buffer to the data handling unit.

16. The device as claimed in claim 1 , wherein the device comprises a data handling unit, and the processor is arranged to control transferring of segments of a data packet from the data handling unit into the first FIFO buffer.

17. The device as claimed in claim 1 , wherein the network protocol is Ethernet for Control automation Technology (EtherCAT).

18. An integrated circuit comprising at least one electronic device according to claim 1 .

19. A method of communicating between electronic devices, the device comprising:

an input unit and an output unit for communicating with other devices according to a network protocol via a communication medium, the network protocol defining data packets comprising data bytes having a predetermined structure including a packet header;

the method comprising

performing input control on incoming data packets and performing output control on outgoing data packets;

the device comprising

a first in first out (FIFO) buffer comprising a multiuser memory, the input of the FIFO buffer being coupled to the input unit and the output of the FIFO buffer being coupled to the output unit, the FIFO buffer being shared between the input control and the output control via the multiuser memory; and

the method comprising

receiving input data comprising incoming data packets from the communication medium,

detecting the start of a respective data packet,

subdividing the data bytes of the respective data packet into consecutive segments, one segment having a predetermined number of data bytes,

transferring the segment to the FIFO buffer before the next segment has been completely received,

in the input control, accessing the multiuser memory for processing the segment,

in the output control, initiating outputting the output packet before the corresponding input data packet has been completely received,

transferring the segment from the FIFO buffer to the output unit, and

transmitting the segment to the communication medium.

20. The method as claimed in claim 19 , wherein the incoming packets correspond to data on a Data Link layer according to an International Organization for Standardization (ISO) layer 2 network protocol.

Assignments (25)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2021
From: NXP B.V.
To: FUTURE LINK SYSTEMS, LLC
Reel/Frame 055115/0491 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0444 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0535 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037358/0001 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Feb 18, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035033/0001 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Feb 18, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035033/0923 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Feb 18, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035034/0019 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2014
From: EDMISTON, GRAHAM; RAHAMIM, HEZI; YOSHA, AMIR
To: FREESCALE SEMICONDUCTOR INC.
Reel/Frame 034465/0275 →