Patent Assignment
Reel/Frame 035033/0001
SUPPLEMENT TO IP SECURITY AGREEMENT
Recorded: 2015-02-18
Received: 2015-02-18
Pages: 25
Assignor
FREESCALE SEMICONDUCTOR, INC.
Executed: 2015-02-13
Assignee
CITIBANK, N.A., AS NOTES COLLATERAL AGENT
390 GREENWICH STREET, NEW YORK, NY, 10013, UNITED STATES
Covered Applications
(100)
SYSTEMS AND METHODS FOR DETECTING CHANGE IN SPECIES IN AN ENVIRONMENT
App. No. 14/625,008
→
METHODS AND SYSTEMS FOR PREDICTING PSYCHOLOGICAL TYPES
App. No. 14/624,925
→
Airborne Rigid Kite With On-Board Power Plant For Ship Propulsion
App. No. 14/620,201
→
METHODS AND SYSTEMS FOR TRANSITIONING AN AERIAL VEHICLE BETWEEN CROSSWIND FLIGHT AND HOVER FLIGHT
App. No. 14/620,204
→
NON-VOLATILE STATIC RANDOM ACCESS MEMORY (NVSRAM) HAVING A SHARED PORT
App. No. 14/588,177
→
VOLTAGE REGULATOR CIRCUIT AND METHOD FOR LIMITING INRUSH CURRENT
App. No. 14/582,209
→
SYSTEMS AND METHODS FOR OPERATING RADIO TRANSCEIVERS
App. No. 14/582,186
→
DIGITAL PRE-DISTORTER
App. No. 14/582,212
→
CURRENT SOURCE, AN INTEGRATED CIRCUIT AND A METHOD
App. No. 14/582,269
→
INTEGRATED CIRCUIT WTH LOW POWER SCAN FLIP-FLOP
App. No. 14/580,237
→
SECURE COMMUNICATION DEVICE AND METHOD
App. No. 14/582,133
→
ELECTRONIC DEVICE FOR PROXIMITY DETECTION, A LIGHT EMITTING DIODE FOR SUCH ELECTRONIC DEVICE, A CONTROL UNIT FOR SUCH ELECTRONIC DEVICE, AN APPARATUS COMPRISING SUCH ELECTRONIC DEVICE AND AN ASSOCIATED METHOD
App. No. 14/410,164
→
SYNCHRONOUS BUS ARCHITECTURE FOR DIGITAL PRE-DISTORTION SYSTEM
App. No. 14/580,158
→
HIGH-SPEED LEVEL SHIFTER WITH VOLTAGE SWING PROTECTION
App. No. 14/580,144
→
CAPACITIVE ARRANGEMENT FOR FREQUENCY SYNTHESIZERS
App. No. 14/410,153
→
METHOD AND APPARATUS FOR REDUCING LEAKAGE CURRENT IN MEMORY
App. No. 14/580,171
→
PHASE LOCKED LOOP AND METHOD FOR GENERATING AN OSCILLATOR SIGNAL
App. No. 14/580,136
→
METHOD AND APPARATUS FOR MANAGING A THERMAL BUDGET OF AT LEAST A PART OF A PROCESSING SYSTEM
App. No. 14/410,146
→
INTEGRATED CIRCUIT DEVICE, SAFETY CIRCUIT, SAFETY-CRITICAL SYSTEM AND METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT DEVICE
App. No. 14/409,486
→
METHOD AND STRUCTURE FOR A LARGE-GRAIN HIGH-K DIELECTRIC
App. No. 14/576,537
→
SYSTEMS AND METHODS TO MITIGATE PROGRAM GATE DISTURB IN SPLIT-GATE FLASH CELL ARRAYS
App. No. 14/576,504
→
SUBSTRATE CORE VIA STRUCTURE
App. No. 14/576,514
→
LOW VOLTAGE, SELF-BIASED, HIGH-SPEED COMPARATOR
App. No. 14/576,201
→
SEMICONDUCTOR DEVICE AND RELATED FABRICATION METHODS
App. No. 14/575,204
→
SEMICONDUCTOR WAFER AND METHOD OF FABRICATING AN IC DIE
App. No. 14/574,597
→
ETHERCAT PACKET FORWARDING WITH DISTRIBUTED CLOCKING
App. No. 14/409,322
→
REDUCING MEMS STICTION BY INCREASING SURFACE ROUGHNESS
App. No. 14/574,784
→
COMMUNICATION UNIT, DIGITAL BAND-PASS SIGMA-DELTA MODULATOR AND METHOD THEREFOR
App. No. 14/574,568
→
INPUT/OUTPUT DRIVER CIRCUIT, INTEGRATED CIRCUIT AND METHOD THEREFOR
App. No. 14/409,310
→
DIGITAL SAMPLE CLOCK GENERATOR, A VIBRATION GYROSCOPE CIRCUITRY COMPRISING SUCH DIGITAL SAMPLE CLOCK GENERATOR, AN ASSOCIATED APPARATUS, AN ASSOCIATED SEMICONDUCTOR DEVICE AND ASSOCIATED METHODS
App. No. 14/409,350
→
DATA PATH CONFIGURATION COMPONENT, SIGNAL PROCESSING DEVICE AND METHOD THEREFOR
App. No. 14/409,314
→
DIRECT MEMORY ACCESS (DMA) UNIT WITH ERROR DETECTION
App. No. 14/574,777
→
SEQUENTIAL ACCESS ASSEMBLY STRIP TEST ADAPTER
App. No. 14/574,398
→
FRACTIONAL AND INTEGER RATIO POLYPHASE INTERPOLATION FILTER
App. No. 14/576,149
→
NON-VOLATILE MEMORY USING BI-DIRECTIONAL RESISTIVE ELEMENTS AND CAPACITIVE ELEMENTS
App. No. 14/572,780
→
WIDEBAND BALUNS AND METHODS OF THEIR MANUFACTURE
App. No. 14/574,008
→
MICROELECTRONIC DEVICES WITH MULTI-LAYER PACKAGE SURFACE CONDUCTORS AND METHODS OF THEIR FABRICATION
App. No. 14/573,519
→
DIE-TO-DIE INDUCTIVE COMMUNICATION DEVICES AND METHODS
App. No. 14/573,674
→
DEVICE HAVING A SHIELD PLATE DOPANT REGION AND METHOD OF MANUFACTURING SAME
App. No. 14/572,773
→
SYSTEM AND METHOD FOR SWITCH STATUS DETECTION
App. No. 14/573,350
→
MAGNETICALLY COUPLED LOAD MODULATION
App. No. 14/573,927
→
DUAL-BAND DOHERTY AMPLIFIER AND METHOD THEREFOR
App. No. 14/573,669
→
METHOD AND APPARATUS FOR COMPENSATING FOR A LOSS OF LOW-FREQUENCY SIGNAL CONTENT OF AN INPUT SIGNAL AT A RECEIVER INPUT
App. No. 14/572,778
→
OVER-TEMPERATURE DETECTOR WITH TEST MODE
App. No. 14/574,026
→
SYSTEM AND METHOD FOR SWITCH STATUS DETECTION
App. No. 14/573,407
→
REAL-SPACE CHARGE-TRANSFER DEVICE AND METHOD THEREOF
App. No. 14/573,891
→
EMI/RFI SHIELDING FOR SEMICONDUCTOR DEVICE PACKAGES
App. No. 14/571,878
→
SYSTEMS AND METHODS FOR SECURE PROVISIONING OF PRODUCTION ELECTRONIC CIRCUITS
App. No. 14/571,637
→
PRODUCTION TEST TRIMMING ACCELERATION
App. No. 14/571,596
→
RADIO FREQUENCY TRANSCEIVER LOOPBACK TESTING
App. No. 14/572,295
→
AMPLIFIERS WITH A SHORT PHASE PATH, PACKAGED RF DEVICES FOR USE THEREIN, AND METHODS OF MANUFACTURE THEREOF
App. No. 14/572,136
→
INVERSE CLASS F AMPLIFIERS WITH INTRINSIC CAPACITANCE COMPENSATION
App. No. 14/572,396
→
LOW POWER CONFIGURATION FOR USB (UNIVERSAL SERIAL BUS) DEVICES
App. No. 14/571,667
→
METHOD AND CIRCUIT FOR GENERATING A PROPORTIONAL-TO-ABSOLUTE-TEMPERATURE CURRENT SOURCE
App. No. 14/572,767
→
KEY MANAGEMENT FOR ON-THE-FLY HARDWARE DECRYPTION WITHIN INTEGRATED CIRCUITS
App. No. 14/570,611
→
THROUGH SUBSTRATE VIA WITH DIFFUSED CONDUCTIVE COMPONENT
App. No. 14/570,029
→
SYSTEM AND METHOD FOR ENHANCED CLOCKING OPERATION
App. No. 14/570,946
→
Thin Beam Deposited Fuse
App. No. 14/570,179
→
Decryption Systems And Related Methods For On-The-Fly Decryption Within Integrated Circuits
App. No. 14/570,706
→
LOW POWER DIGITAL SELF-GATED BINARY COUNTER
App. No. 14/568,115
→
PSEUDO SRAM USING RESISTIVE ELEMENTS FOR NON-VOLATILE STORAGE
App. No. 14/568,467
→
METHOD AND APPARATUS FOR IMPLEMENTING DETERMINISTIC RESPONSE FRAME TRANSMISSION
App. No. 14/568,298
→
NANOCRYSTAL MEMORY AND METHODS FOR FORMING SAME
App. No. 14/568,155
→
CONTROL OF POWER TRANSFER
App. No. 14/568,250
→
STRESS ISOLATED DIFFERENTIAL PRESSURE SENSOR
App. No. 14/569,068
→
NETWORK INTERFACE MODULE AND A METHOD OF CHANGING NETWORK CONFIGURATION PARAMETERS WITHIN A NETWORK DEVICE
App. No. 14/568,321
→
METHOD AND COMPUTER SYSTEM FOR SIMULATING OPERATION OF A PROGRAMMABLE INTEGRATED CIRCUIT
App. No. 14/568,282
→
LVDS WITH IDLE STATE
App. No. 14/568,442
→
COHERENT MEMORY INTERLEAVING WITH UNIFORM LATENCY
App. No. 14/568,433
→
SEMICONDUCTOR DEVICE AND RELATED FABRICATION METHODS
App. No. 14/567,357
→
SEMICONDUCTOR DEVICE AND RELATED PROTECTION METHODS
App. No. 14/567,291
→
SYSTEM AND METHOD FOR HANDLING MEMORY REPAIR DATA
App. No. 14/568,091
→
SCAN TESTING WITH STAGGERED CLOCKS
App. No. 14/566,823
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METHOD AND SYSTEM FOR DETERMINING MINIMUM OPERATIONAL VOLTAGE FOR TRANSISTOR MEMORY-BASED DEVICES
App. No. 14/567,634
→
INPUT CONTROL CIRCUIT FOR ANALOG DEVICE
App. No. 14/568,093
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INTEGRATED CIRCUIT WITH MULTI-VOLTAGE INPUT/OUTPUT (I/O) CELLS
App. No. 14/568,074
→
GLUCOSE MONITORING SYSTEM AS CONTROL INPUT TO ADJUSTABLE FOCAL LENGTH LENSES
App. No. 14/566,952
→
WIRELESS COMMUNICATION APPARATUS AND METHOD FOR HARQ BUFFER MANAGEMENT
App. No. 14/568,087
→
INTEGRATED CIRCUIT WITH SCAN CHAIN HAVING DUAL-EDGE TRIGGERED SCANNABLE FLIP FLOPS AND METHOD OF OPERATING THEREOF
App. No. 14/566,833
→
HIGH-SPEED VOLTAGE LEVEL SHIFTER CIRCUIT
App. No. 14/568,097
→
A METHOD FOR CUT THROUGH FORWARDING DATA PACKETS BETWEEN ELECTRONIC COMMUNICATION DEVICES
App. No. 14/406,954
→
METHOD OF SENSING A USER INPUT TO A CAPACITIVE TOUCH SENSOR, A CAPACITIVE TOUCH SENSOR CONTROLLER, AN INPUT DEVICE AND AN APPARATUS
App. No. 14/406,960
→
MEMORY ARRAY WITH READ ONLY CELLS HAVING MULTIPLE STATES AND METHOD OF PROGRAMMING THEREOF
App. No. 14/565,875
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DC OFFSET CALIBRATION OF WIRELESS RECEIVERS
App. No. 14/565,745
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VOLTAGE RECULATOR CIRCUIT AND METHOD THEREFOR
App. No. 14/406,968
→
STRESS ISOLATED MEMS DEVICE WITH ASIC AS CAP
App. No. 14/564,340
→
COMMUNICATIONS ENABLED APPARATUS WITH A MULTI-MAC MANAGER AND A METHOD OF OPERATING THEREOF
App. No. 14/564,770
→
APPARATUS AND METHOD FOR PROCESSING TRACE DATA STREAMS
App. No. 14/564,602
→
APPARATUS AND METHOD FOR DETERMINING A CUMULATIVE SIZE OF TRACE MESSAGES GENERATED BY A PLURALITY OF INSTRUCTIONS
App. No. 14/564,673
→
POWER SWITCH CONTROL BETWEEN USB AND WIRELESS POWER SYSTEM
App. No. 14/565,395
→
3D GRAPHICS SYSTEM USING ENCRYPTED TEXTURE TILES
App. No. 14/563,139
→
FLOATING MOLD TOOL FOR SEMICONDCUTOR PACKAGING
App. No. 14/562,770
→
SEMICONDUCTOR DEVICE INCLUDING ACCELEROMETER DEVICES
App. No. 14/561,726
→
PACKAGED SENSOR WITH INTEGRATED OFFSET CALIBRATION
App. No. 14/562,154
→
METHOD AND CONTROL DEVICE FOR CIRCUIT LAYOUT MIGRATION
App. No. 14/561,280
→
Thermally Enhanced Package with Lid Heat Spreader
App. No. 14/560,678
→
PACKAGED SEMICONDUCTOR SENSOR DEVICE WITH LID
App. No. 14/559,921
→
RADIATION DEVICES
App. No. 14/560,675
→
MULTIPLE-STATE, SWITCH-MODE POWER AMPLIFIER SYSTEMS AND METHODS OF THEIR OPERATION
App. No. 14/559,895
→
MULTIPLE-STATE, SWITCH-MODE POWER AMPLIFIER SYSTEMS AND METHODS OF THEIR OPERATION
App. No. 14/559,898
→