IP Library Granted Patent US 9,319,010
Granted Patent B1
US 9,319,010 · App. 14/572,396 · Granted Apr 19, 2016

Inverse class F amplifiers with intrinsic capacitance compensation

Inventors: Joseph Staudinger (Gilbert, AZ); Maruf Ahmed (Tempe, AZ); Hussain H. Ladhani (Chandler, AZ)
Assignee: FREESCALE SEMICONDUCTOR INC.
H03F3/2171H03F1/0205H03F1/565H03F3/193H03F2200/267H03F2200/333H03F2200/387H03F2200/391H03F2200/451
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Quick Facts
Patent No.
US 9,319,010
App. No.
14/572,396
Granted
Apr 19, 2016
Kind
B1
Abstract

The embodiments described herein provide inverse class F (class F −1 ) amplifiers. In general, the inverse class F amplifiers are implemented with a transistor, an output inductance and a transmission line configured to approximate inverse class F voltage and current output waveforms by compensating the effects of the transistor's intrinsic output capacitance for some even harmonic signals while providing a low impedance for some odd harmonic signals. Specifically, the transistor is configured with the output inductance and transmission line to form a parallel LC circuit that resonates at the second harmonic frequency. The parallel LC circuit effectively creates high impedance for the second harmonic signals, thus blocking the capacitive reactance path to ground for those harmonic signals that the intrinsic output capacitance would otherwise provide. This facilitates the operation of the amplifier as an effective, high efficiency, inverse class F amplifier.

Claims (30)

1. A radio frequency (RF) amplifier configured to operate at a fundamental frequency (f 0 ), the RF amplifier comprising:

a transistor including a transistor output and an intrinsic output capacitance coupled to the transistor output;

an output inductance including a first node and a second node, the output inductance first node coupled to the transistor output; and

a transmission line including a first node and a second node, the transmission line first node coupled to the output inductance second node, wherein the transmission line and output inductance are configured to form a parallel inductor-capacitor (LC) circuit with the intrinsic output capacitance for second harmonic signals at about twice the fundamental frequency (2f 0 ), and wherein the parallel LC circuit is configured to resonate for the second harmonic signals to create a high impedance at the transistor output to prevent the intrinsic output capacitance from providing a capacitive reactance path to ground for the second harmonic signals.

2. The RF amplifier of claim 1 further comprising a series LC circuit coupled between the transmission line first node and the output inductance second node, the series LC circuit including an inductor in series with a capacitor, the series LC circuit having a resonant frequency at about twice the fundamental frequency (2f 0 ).

3. The RF amplifier of claim 1 further comprising a capacitor coupled between the transmission line first node and the output inductance second node.

4. The RF amplifier of claim 1 wherein the transmission line second node is coupled to a voltage reference, and wherein the transmission line has an effective length of about a quarter wavelength of the fundamental frequency (f 0 ) such that the transmission line presents a high impedance for signals at about the fundamental frequency (f 0 ) and presents a low impedance to the voltage reference for the second harmonic signals.

5. The RF amplifier of claim 1 wherein the transmission line second node is coupled to a an open node, and wherein the transmission line has an effective length of about a quarter wavelength of twice the fundamental frequency (2f 0 ) such that the transmission line presents a low impedance for the second harmonic signals.

6. The RF amplifier of claim 1 wherein the intrinsic output capacitance comprises a drain-source intrinsic capacitance.

7. The RF amplifier of claim 1 wherein the transistor comprises a gallium nitride (GaN) field effect transistor (FET).

8. The RF amplifier of claim 1 wherein the output inductance is provided at least in part by an integrated passive device.

9. The RF amplifier of claim 1 wherein the output inductance is provided at least in part by a bonding wire coupled to the transistor output.

10. An inverse class F amplifier configured to operate at a fundamental frequency (f 0 ), the inverse class F amplifier comprising:

a transistor including a transistor output and an intrinsic output capacitance coupled to the transistor output;

an output inductance including a first node and a second node, the output inductance first node coupled to the transistor output;

a passive circuit element, the passive circuit element including a first node, and a second node, the passive element first node coupled to the output inductance second node; and

a transmission line including a first node and a second node, the transmission line first node coupled to the passive circuit element second node, and the transmission line second node coupled to a voltage reference, wherein the transmission line has an effective length of about a quarter wavelength of the fundamental frequency (f 0 ) such that the transmission line presents a high impedance to the passive circuit element second node for signals at about the fundamental frequency (f 0 ) and presents a low impedance to the voltage reference to the passive circuit element second node for second harmonic signals at about twice the fundamental frequency (2f 0 ), and wherein the output inductance and the intrinsic output capacitance operate as a parallel inductor-capacitor (LC) circuit having a resonant frequency of about twice the fundamental frequency (2f 0 ) to create a high impedance at the transistor output such that the intrinsic output capacitance is prevented from providing a capacitive reactance path to ground for the second harmonic signals while still providing the capacitive reactance path for third harmonic signals at about three times the fundamental frequency (3f 0 ).

11. The inverse class F amplifier of claim 10 wherein the passive circuit element comprises a series LC circuit, the series LC circuit including an inductor in series with a capacitor, the series LC circuit having a resonant frequency of about twice the fundamental frequency (2f 0 ).

12. The inverse class F amplifier of claim 10 wherein the passive circuit element comprises a capacitor having a capacitance between 10 picofarads (pF) to 100 pF.

13. The inverse class F amplifier of claim 10 wherein the transistor comprises a gallium nitride (GaN) field effect transistor (FET), and wherein the intrinsic output capacitance comprises a drain-source intrinsic capacitance.

14. The inverse class F amplifier of claim 10 wherein the output inductance is provided at least in part by an integrated passive device.

15. The inverse class F amplifier of claim 10 wherein the output inductance is provided at least in part by a bonding wire, the bonding wire coupling the transistor to the passive circuit element.

16. An inverse class F amplifier configured to operate at a fundamental frequency (f 0 ), the inverse class F amplifier comprising:

a transistor including a transistor output and an intrinsic output capacitance coupled to the transistor output;

an output inductance including a first node and a second node, the output inductance first node coupled to the transistor output; and

a transmission line including a first node and a second node, the transmission line first node coupled to the output inductance second node, and the transmission line second node coupled to an open node, wherein the transmission line has an effective length of about a quarter wavelength of twice the fundamental frequency (2f 0 ), and wherein the output inductance and the intrinsic output capacitance operate as a parallel inductor-capacitor (LC) circuit having a resonant frequency of about twice the fundamental frequency (2f 0 ) to create a high impedance at the transistor output such that the intrinsic output capacitance is prevented from providing a capacitive reactance path to ground for second harmonic signals at about twice the fundamental frequency (2f 0 ) while still providing the capacitive reactance path for third harmonic signals at about three times the fundamental frequency (3f 0 ).

17. The inverse class F amplifier of claim 16 wherein the transistor comprises a gallium nitride (GaN) field effect transistor (FET).

18. The inverse class F amplifier of claim 16 wherein the intrinsic output capacitance comprises a drain-source intrinsic capacitance.

19. The inverse class F amplifier of claim 16 wherein the output inductance is provided at least in part by an integrated passive device.

20. The inverse class F amplifier of claim 16 wherein the output inductance is provided at least in part by a bonding wire, the bonding wire coupling the transistor to the transmission line.

Assignments (11)
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0444 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0535 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037358/0001 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Feb 18, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035034/0019 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Feb 18, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035033/0923 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Feb 18, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035033/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2014
From: STAUDINGER, JOSEPH; AHMED, MARUF; LADHANI, HUSSAIN H.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 034530/0239 →