High voltage junction field effect transistor
The present invention discloses a high voltage JFET. The high voltage JFET includes a second conductivity type drift region located on the first conductivity type epitaxial layer; a second conductivity type drain heavily doped region located in the second conductivity type drift region; a drain terminal oxygen region located on the second conductivity type drift region and at a side of the second conductivity type drain heavily doped region; a first conductivity type well region located at a side of the second conductivity type drift region; a second conductivity type source heavily doped region and a first conductivity type gate heavily doped region located on the first conductivity type well region, and a gate source terminal oxygen region; a second conductivity type channel layer located between the second conductivity type source heavily doped region and the second conductivity type drift region; a dielectric layer and a field electrode plate located on the second conductivity type channel layer. Wherein a drain electrode electrically is led out from the second conductivity type drain heavily doped region; a source electrode electrically is led out from a connection of the field electrode plate and the second conductivity type source heavily doped region; and a gate electrode electrically is led out from the first conductivity type gate heavily doped region. The transistor has a high breakdown voltage and easy to be integrated.
1. A high voltage junction field effect transistor, comprising:
a semiconductor substrate provided with a first conductivity type epitaxial layer;
a second conductivity type drift region located on the first conductivity type epitaxial layer;
a second conductivity type drain heavily doped region located in the second conductivity type drift region;
two drain terminal oxygen regions located at opposite sides of the second conductivity type drain heavily doped region, and both positioned on the second conductivity type drift region;
two first conductivity type well regions located at opposite sides of the second conductivity type drift region, and each first conductivity type well region being isolated from the second conductivity type drift region by the first conductivity type epitaxial layer;
a second conductivity type source heavily doped region and a first conductivity type gate heavily doped region in each first conductivity type well region, a gate source terminal oxygen region being provided between the second conductivity type source heavily doped region and the first conductivity type gate heavily doped region to isolate the second conductivity type source heavily doped region from the first conductivity type gate heavily doped region;
two first second conductivity type channel layers each located between one second conductivity type source heavily doped region and the second conductivity type drift region;
two field electrode plates respectively located on the two second conductivity type channel layers, each field electrode plate extending to a part of the surface of corresponding drain terminal oxygen region, and a dielectric layer being provided between the field electrode plate and the second conductivity type channel layer, the dielectric layer also located between the field electrode plate and the second conductivity type drift region;
wherein, a drain electrode electrically is led out from the two second conductivity type drain heavily doped region; a source electrode electrically is led out from connections of the two field electrode plates at opposite sides of the drain electrode and the two second conductivity type source heavily doped regions; and a gate electrode electrically is led out from a connection of the two first conductivity type gate heavily doped regions at opposite sides of the drain electrode.
2. The high voltage junction field effect transistor according to claim 1 , wherein the second conductivity type channel layer is a second conductivity type implantation layer formed by ions implantation.
3. The high voltage junction field effect transistor according to claim 1 , wherein the field electrode plate is a polycrystalline layer or a metallic layer.
4. The high voltage junction field effect transistor according to claim 1 , wherein the high voltage field effect transistor is provided with a second conductivity type well region at opposite sides thereof, and a second conductivity type deep well region is provided beneath the first conductivity type epitaxial layer to isolate the high voltage field effect transistor.
5. The high voltage junction field effect transistor according to claim 1 , wherein the first conductivity type is P type, the second conductivity type is N type.
6. The high voltage junction field effect transistor according to claim 1 , wherein the first conductivity type is N type, the second conductivity type is P type.