IP Library Granted Patent US 9,900,548
Granted Patent B2
US 9,900,548 · App. 14/421,894 · Granted Feb 20, 2018

Display control unit and method for generating a video signal

Inventors: Michael Staudenmaier (Munich, DE); Kshitij Bajaj (Sirsa, IN); Mehul Kumar (Meerut, IN); Sarthak Mittal (Dehli, IN)
Assignee: NXP USA, INC.
H04N5/91G06T1/60G09G5/393H04N5/04H04N5/265G09G5/001G09G2320/103G09G2360/10G09G2380/10
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Quick Facts
Patent No.
US 9,900,548
App. No.
14/421,894
Granted
Feb 20, 2018
Kind
B2
Abstract

A display control unit is connected to a display and arranged to generate a video signal representing a sequence of video frames to be displayed consecutively on said display. The display control unit may include a first memory unit arranged to buffer a set of image descriptors; a second memory unit connected between said first memory unit and said display; an update unit connected to said first memory unit and arranged to update said image descriptors in said first memory unit and to generate a proceed signal only when said set of image descriptors in said first memory unit is up to date; a copy unit arranged to copy said image descriptors from said first memory unit to said second memory unit in response to said proceed signal; and a video unit arranged to generate said video signal on the basis of said image descriptors in said second memory unit.

Claims (38)

1. A display controller configured to be connected to a display and arranged to generate a video signal representing a sequence of video frames to be displayed consecutively on said display, said display controller comprising:

a first memory arranged to buffer a set of image descriptors;

a second memory configured to be connected between said first memory and said display;

an updater connected to said first memory, the updater to update said image descriptors in said first memory, and to generate a proceed signal only after the update of said set of image descriptors in said first memory is completed, and to transmit the proceed signal after the proceed signal is generated, wherein the proceed signal indicates that the image descriptors in the first memory are consistent and that the updated set of image descriptors is to be copied from the first memory unit to the second memory unit;

a copier arranged to receive the transmitted proceed signal, and to copy said image descriptors from said first memory to said second memory unit in response to said proceed signal being received; and

a video generator arranged to generate said video signal on the basis of said image descriptors in said second memory.

2. The display controller of claim 1 , wherein said first memory is a register.

3. The display controller of claim 1 , wherein said second memory is a static random access memory.

4. The display controller of claim 1 , wherein said updater is arranged to update said image descriptors only when said copier has terminated copying said image descriptors to second register.

5. The display controller of claim 1 , wherein said updater is arranged to update said image descriptors in response to said copier having terminated copying said image descriptors to second register.

6. The display controller of claim 1 , wherein said video generator is arranged to receive an image stream and to generate said video signal on the basis of said image descriptors in said second memory and said image stream.

7. The display controller of claim 1 , wherein said image descriptors are arranged to describe several images to be displayed simultaneously on said display.

8. The display controller of claim 1 , wherein said updater and said copier each comprise a dedicated integrated circuit.

9. A method for generating a video signal representing a sequence of video frames to be displayed consecutively on a display, comprising:

updating a set of image descriptors in a first memory unit;

transmitting a proceed signal only in response to the updating of the set of image descriptors in the first memory being completed, wherein the proceed signal indicates that the image descriptors in the first memory are consistent and that the updated set of image descriptors is to be copied from the first memory unit to a second memory unit;

receiving, at a copier, the transmitted proceed signal;

copying said image descriptors from said first memory unit to the second memory unit in response to the proceed signal being received; and

generating said video signal on the basis of said image descriptors in said second memory unit.

10. The method of claim 9 , wherein said updating said image descriptors in said first memory starts in a first frame period and extends into a next frame period.

11. The method of claim 9 , further comprising: receiving an image stream and generating said video signal on the basis of said image descriptors in said second memory unit and said image stream.

12. The method of claim 9 , wherein said image descriptors are arranged to describe several images to be displayed simultaneously on said display.

13. The method of claim 9 , wherein the second memory is a static random access memory.

14. The method of claim 9 , wherein the first memory is a register.

15. A method for generating a video signal representing a sequence of video frames to be displayed consecutively on a display, comprising:

updating a set of image descriptors in a first memory;

transmitting a proceed signal only in response to the updating of the set of image descriptors in the first memory being completed, wherein the proceed signal indicates that the image descriptors in the first memory are consistent and that the updated set of image descriptors is to be copied from the first memory unit to a second memory unit;

receiving, at a copier, the transmitted proceed signal;

copying the image descriptors from the first memory to the second memory in response to the proceed signal being received and in response to a beginning of a new frame after the proceed signal is provided; and

generating the video signal on the basis of the image descriptors in the second memory unit.

16. The method of claim 15 , wherein the first memory is a register.

17. The method of claim 15 , wherein the second memory is a static random access memory.

18. The method of claim 15 , further comprising:

updating the image descriptors in response to a copying of the image descriptors to a second register being terminated.

19. The method of claim 15 , further comprising:

receiving an image stream; and

generating the video signal on the basis of the image descriptors in the second memory and the image stream.

20. The method of claim 15 , wherein the image descriptors are arranged to describe several images to be displayed simultaneously on the display.

Assignments (24)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0341 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0359 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0974 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035571/0112 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035571/0080 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded May 4, 2015
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 035571/0095 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 16, 2015
From: STAUDENMAIER, MICHAEL; BAJAJ, KSHITIJ; KUMAR, MEHUL; MITTAL, SARTHAK
To: FREESCALE SEMICONDUCTOR INC.
Reel/Frame 034966/0582 →
Continuity (1)
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