IP Library Granted Patent US 10,074,719
Granted Patent B2
US 10,074,719 · App. 14/443,199 · Granted Sep 11, 2018

Semiconductor device in which an insulated-gate bipolar transistor ( IGBT) region and a diode region are formed on one semiconductor substrate

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Quick Facts
Patent No.
US 10,074,719
App. No.
14/443,199
Granted
Sep 11, 2018
Kind
B2
Abstract

The present application discloses a semiconductor device in which an IGBT region and a diode region are formed on one semiconductor substrate. The IGBT region includes: a collector layer; an IGBT drift layer; a body layer; a gate electrode; and an emitter layer. The diode region includes: a cathode layer; a diode drift layer; an anode layer; a trench electrode; and an anode contact layer. The diode region is divided into unit diode regions by the gate electrode or the trench electrode. In a unit diode region adjacent to the IGBT region, when seen in a plan view of the front surface of the semiconductor substrate, the anode layer and the anode contact layer are mixedly placed, and the anode contact layer is placed at least in a location opposite to the emitter layer with the gate electrode interposed therebetween.

Claims (25)

1. A semiconductor device in which an Insulated-Gate Bipolar Transistor (IGBT) region and a diode region are formed on one semiconductor substrate, the semiconductor device comprising:

a front surface electrode provided on a front surface of the semiconductor substrate; and

a back surface electrode provided on a back surface of the semiconductor substrate,

the IGBT region comprising:

a collector layer of a first conductivity type, the collector layer being in contact with the back surface electrode;

an IGBT drift layer of a second conductivity type, the IGBT drift layer being provided on a front surface side of the semiconductor substrate with respect to the collector layer;

a body layer of the first conductivity type, the body layer being provided on the front surface side of the semiconductor substrate with respect to the IGBT drift layer, the body layer being in contact with the front surface electrode;

gate electrodes, each being placed within a trench extending from the front surface of the semiconductor substrate to the IGBT drift layer and insulated from the semiconductor substrate and the front surface electrode by an insulating film; and

an emitter layer of the second conductivity type, the emitter layer being partially provided between the body layer and the front surface electrode, the emitter layer being in contact with the insulating film of a gate electrode and the front surface electrode,

the diode region comprising:

a cathode layer of the second conductivity type, the cathode layer being in contact with the back surface electrode;

a diode drift layer of the second conductivity type, the diode drift layer being provided on the front surface side of the semiconductor substrate with respect to the cathode layer, the diode drift layer being lower in impurity concentration than the cathode layer;

an anode layer of the first conductivity type, the anode layer being provided on the front surface side of the semiconductor substrate with respect to the diode drift layer, the anode layer being in contact with the front surface electrode;

trench electrodes, each being placed within a trench extending from the front surface of the semiconductor substrate to the diode drift layer and insulated from the semiconductor substrate by an insulating film; and

a plurality of anode contact layers of the first conductivity type, the plurality of anode contact layers being partially provided between the anode layer and the front surface electrode, the plurality of anode contact layers being higher in impurity concentration than the anode layer,

the IGBT region being divided into unit IGBT regions by the gate electrodes adjacent to each other,

in a unit IGBT region adjacent to the diode region, when seen in a plan view of the front surface of the semiconductor substrate, the emitter layer being placed between two insulated gate electrodes, and a plurality of portions of the emitter layer spans the entire area between one of the insulated gate electrodes and the other of the insulated gate electrodes so that the body layer is divided into rectangular regions by at least the plurality of portions of the emitter layer,

the diode region being divided into unit diode regions by the gate electrode and a trench electrode adjacent to the gate electrode, or by the trench electrodes adjacent to each other, and

in a unit diode region adjacent to the IGBT region, when seen in a plan view of the front surface of the semiconductor substrate,

(i) the anode layer and the plurality of anode contact layers being mixedly placed,

(ii) the plurality of anode contact layers being placed at least in locations opposite to the plurality of portions of the emitter layer with the gate electrode interposed therebetween,

(iii) the plurality of anode contact layers being placed near the gate electrode with respect to a direction orthogonal to a longitudinal direction of the gate electrode,

(iv) the anode layer being placed in a middle of the unit diode region with respect to the direction orthogonal to the longitudinal direction of the gate electrode,

(v) the plurality of anode contact layers being placed at intervals along the longitudinal direction of the gate electrode, and

(vi) the plurality of anode contact layers and the anode layer being alternately placed along the longitudinal direction of the gate electrode.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: TOYOTA JIDOSHA KABUSHIKI KAISHA
To: DENSO CORPORATION
Reel/Frame 052285/0419 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2015
From: KAMEYAMA, SATORU; KIMURA, KEISUKE
To: TOYOTA JIDOSHA KABUSHIKI KAISHA
Reel/Frame 035649/0417 →