Susceptor having a hollow in its wall facing the orientation flat of a semiconductor wafer

1. A susceptor configured to set a semiconductor wafer thereon, the wafer having an upper surface, a lower surface, a thickness between the upper and lower surfaces, an orientation flat, and an arched periphery, the susceptor comprising:

a first inner wall, a second inner wall, and a bottom that define a pocket of the susceptor, the first inner wall facing the orientation flat of the semiconductor wafer, the second inner wall facing the arched periphery of the wafer, and the bottom surface supporting the lower surface of the wafer, the first inner wall having a center and a hollow extending outwardly from the center of the first inner wall,

wherein the hollow has a step with a height less than the thickness of the semiconductor wafer, and

wherein the hollow satisfies relations of:

Li <√{square root over ( )}((2× Rw−Rp−d ) 2 −Hp 2 ),

Lo >√{square root over ( )}((2× Rw−Rp ) 2 −Hp 2 ), and

( Lo−Li )< Lf/ 4,

where Li is a length from the center of the first inner wall to an edge of the hollow that is closer to the center, Lo is a length from the center of the first inner wall to another edge of the hollow that is farther from the center of the first inner wall than the edge of the hollow, Lf is a length of the orientation flat, Rw is a radius of the semiconductor wafer, Rp is a radius of the pocket measured in the second inner wall, Hp is a length from a center of the pocket to the first inner wall, and d is a depth where the semiconductor wafer in an end of the orientation flat penetrates within the hollow.

2. The susceptor of claim 1 ,

wherein the first inner wall has another hollow to provide a pair of hollows, each hollow being formed in a position in the first inner wall so that the hollows are symmetrical with respect to the center of the first inner wall, and

wherein the another hollow satisfies the relations:

Li <√{square root over ( )}((2× Rw−Rp−d ) 2 −Hp 2 ),

Lo >√{square root over ( )}((2× Rw−Rp ) 2 −Hp 2 ), and

( Lo−Li )< Lf/ 4.

3. The susceptor of claim 1 ,

wherein the semiconductor wafer has a chamfered periphery defining a tangent line, and

wherein the step has a corner abutting against the chamfered periphery on the tangent line, the tangent line forming an angle with respect to the bottom of the pocket that is greater than or equal to 10° but less than or equal to 80°.

4. The susceptor of claim 1 ,

wherein the semiconductor wafer has a chamfered periphery, and

wherein the step has a height greater than or equal to Rw/500.