Field-effect transistor stack voltage compensation
Field-effect transistor (FET) stack voltage compensation. In some embodiments, a switching device can include a first terminal and a second terminal, and a plurality of switching elements connected in series between the first and terminal and the second terminal. Each switching element has a parameter that is configured to yield a desired voltage drop profile among the connected switching elements. Such a desired voltage drop profile can be achieved by some or all FETs in a stack having variable dimensions such as variable gate width or variable numbers of fingers associated with the gates.
1. A switching device comprising:
a first terminal and a second terminal; and
a plurality of field-effect transistors connected in series between the first terminal and the second terminal, the field-effect transistors including a first end field-effect transistor connected to the first terminal and a second end field-effect transistor connected to the second terminal, each field-effect transistor including a gate having a plurality of fingers, a plurality of source fingers, and a plurality of drain fingers arranged such that gate fingers are interleaved between the source and gate fingers, the gate fingers of each field-effect transistor having a width such that the field-effect transistors have a distribution of gate width values where the first end field-effect transistor has a gate width value greater than the other field-effect transistors, and where the distribution of gate width values decreases from the first end field-effect transistor for at least half of the field-effect transistors to a minimum gate width value corresponding to a field-effect transistor between the first end field-effect transistor and the second end field-effect transistor, the minimum gate width value being less than a gate width value of the second end field-effect transistor.
2. The switching device of claim 1 wherein the field-effect transistor is implemented as a silicon-on-insulator device.
3. The switching device of claim 1 wherein the decrease in the gate width distribution from the first end field-effect transistor to the field-effect transistor with the minimum gate width value includes a transistor-to-transistor monotonic decrease or at least one step function decrease, each of the at least one step function including a plurality of field-effect transistors.
4. The switching device of claim 3 wherein at least some of the field-effect transistors have different numbers of gate fingers.
5. The switching device of claim 1 wherein the distribution of gate width values is configured such that a voltage drop profile is approximately uniform among the connected field-effect transistors.
6. The switching device of claim 1 wherein the first terminal is an input terminal and the second terminal is an output terminal.
7. The switching device of claim 6 wherein the input terminal is configured to receive a radio-frequency signal.
8. The switching device of claim 7 wherein the radio-frequency signal includes a power-amplified transmit signal.
9. A radio-frequency switching module comprising:
a packaging substrate configured to receive a plurality of components; and
a die mounted on the packaging substrate, the die having a switching circuit, the switching circuit including a plurality of field-effect transistors connected in series between a first terminal and a second terminal, the field-effect transistors including a first end field-effect transistor connected to the first terminal and a second end field-effect transistor connected to the second terminal, each field-effect transistor including a gate having a plurality of fingers, a plurality of source fingers, and a plurality of drain fingers arranged such that gate fingers are interleaved between the source and gate fingers, the gate fingers of each field-effect transistor having a width such that the field-effect transistors have a distribution of gate width values where the first end field-effect transistor has a gate width value greater than the other field-effect transistors, and where the distribution of gate width values decreases from the first end field-effect transistor for at least half of the field-effect transistors to a minimum gate width value corresponding to a field-effect transistor between the first end field-effect transistor and the second end field-effect transistor, the minimum gate width value being less than a gate width value of the second end field-effect transistor.
10. The radio-frequency switching module of claim 9 wherein the die is a silicon-on-insulator die.
11. The radio-frequency switching module of claim 10 wherein the distribution of gate width values is configured such that a voltage drop profile is approximately uniform among the field-effect transistors connected in series.
12. The radio-frequency switching module of claim 9 wherein at least some of the field-effect transistors have different numbers of gate fingers.
13. The radio-frequency switching module of claim 9 wherein the decrease in the gate width distribution from the first end field-effect transistor to the field-effect transistor with the minimum gate width value includes a transistor-to-transistor monotonic decrease or at least one step function decrease, each of the at least one step function including a plurality of field-effect transistors.
14. The radio-frequency switching module of claim 9 wherein the radio-frequency switching module is configured to route one or more radio-frequency signals to and from an antenna.