IP Library Granted Patent US 9,569,355
Granted Patent B2
US 9,569,355 · App. 14/459,584 · Granted Feb 14, 2017

Memory system and control method

Inventors: Yohei Hasegawa (Kawasaki, JP); Shigehiro Asano (Yokosuka, JP); Tokumasa Hara (Kawasaki, JP)
Assignee: Kabushiki Kaisha Toshiba
G06F12/0246G06F11/1012G06F2212/1016G06F2212/1036G06F2212/7207
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Quick Facts
Patent No.
US 9,569,355
App. No.
14/459,584
Granted
Feb 14, 2017
Kind
B2
Abstract

According to an embodiment, a memory system includes multiple nonvolatile memories to/from each of which data can be written/read independently of one another; and a controller configured to control writing of data to and reading of data from the nonvolatile memories. Each of the nonvolatile memories includes a data storage including a normal data storage area for storing the data and a redundant data storage area for writing the data avoiding defect positions in the normal data storage area; and a defect information storage configured to store defect information indicating information on a defect of the data storage included in another nonvolatile memory different from the present nonvolatile memory.

Claims (46)

1. A memory system comprising:

multiple nonvolatile memories to/from each of which data is written/read independently of one another; and

a controller configured to control writing of data to and reading of data from the nonvolatile memories, wherein

each of the nonvolatile memories includes a data storage and a defect information storage,

the data storage including a normal data storage area for storing the data and a redundant data storage area for writing the data avoiding defect positions in the normal data storage area; and

the defect information storage configured to store defect information indicating information on a defect of the data storage included in another nonvolatile memory different from the present nonvolatile memory.

2. The system according to claim 1 , wherein the controller includes:

a read control unit configured to perform control to read the data stored in the data storage from which the data are to be read in receipt of a request for reading the data; and

a defect information analyzing unit configured to read the defect information from the defect information storage associated with the data storage from which the data are to be read, and analyze the defect information to locate a defect position, and

the read control unit performs control to modify the read data on the basis of the defect position located by the defect information analyzing unit.

3. The system according to claim 2 , wherein

the controller further includes:

a write control unit configured to determine the data storage to which the data are to be written in receipt of a request for writing the data,

the defect information analyzing unit reads the defect information from the defect information storage associated with the data storage to which the data are to be written, and analyzes the defect information to locate a defect position, and

the write control unit controls writing of the data to the data storage avoiding writing of data to the defect position located by the defect information analyzing unit.

4. The system according to claim 3 , wherein the defect information analyzing unit identifies second position information indicating a position of the defect information storage associated with the data storage to/from which the data are to be written/read by using a linear expression on first position information indicating a position of the data storage to/from which the data are to be written/read.

5. The system according to claim 3 , wherein the defect information analyzing unit refers to association information that is association of first position information indicating a position of the data storage and second position information indicating a position of the defect information storage to identify the second position information associated with the first position information indicating the position of the data storage to/from which the data are to be written/read.

6. The system according to claim 3 , further comprising a defect information cache configured to retain the defect information, wherein

when the defect information of the data storage to/from which the data are to be written/read is present in the defect information cache, the defect information analyzing unit reads the defect information from the defect information cache.

7. The system according to claim 1 , further comprising:

a defect detector configured to detect a defect position of the data storage;

a defect information generator configured to regenerate the defect information to be stored in the defect information storage associated with the data storage from the defect information read from the defect information storage and the defect position detected by the defect detector; and

a defect information updating unit configured to write the defect information generated by the defect information generator back to the defect information storage.

8. The system according to claim 1 , wherein

the controller includes:

a data protecting unit configured to perform error correction on the data storage; and

a defect information protecting unit configured to perform error correction on the defect information storage, and

the defect information protecting unit has a higher error correction capability than the data protecting unit.

9. A control method for a memory system including:

multiple nonvolatile memories each including a data storage and a defect information storage, the data storage having a normal data storage area for storing data and a redundant data storage area for writing the data avoiding defect positions in the normal data storage area, and the defect information storage configured to store defect information indicating information on defects in the data storage, the nonvolatile memories allowing writing/reading of data thereto/therefrom independently of one another; and

a controller configured to control writing of data to and reading of data from the nonvolatile memories, the control method comprising:

a read control step of performing control to read the data stored in the data storage from which the data are to be read in receipt of a request for reading the data;

a defect information analyzing step of reading the defect information from the defect information storage included in another nonvolatile memory associated with the data storage of the nonvolatile memory from which the data are to be read, and analyzing the defect information to locate a defect position; and

a modification control step of performing control to modify the data read in the read control step on the basis of the defect position located in the defect information analyzing step.

10. A memory system comprising:

multiple nonvolatile memories to/from each of which data is written/read independently of one another; and

a controller configured to control writing of data to and reading of data from the nonvolatile memories, wherein

each of the nonvolatile memories includes a data storage and a defect information storage,

the data storage including a normal data storage area for storing the data; and

the defect information storage configured to store defect information indicating information on a defect of the data storage included in another nonvolatile memory different from the present nonvolatile memory.

11. A memory system comprising:

a nonvolatile memory having multiple nonvolatile memory planes to/from each of which data is written/read independently of one another; and

a controller configured to control writing of data to and reading of data from the nonvolatile memories, wherein

each of the nonvolatile memories planes includes a data storage and a defect information storage,

the data storage including a normal data storage area for storing the data; and

the defect information storage configured to store defect information indicating information on a defect of the data storage included in another nonvolatile memory plane different from the present nonvolatile memory plane.

Assignments (5)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043709/0035 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 29, 2014
From: HASEGAWA, YOHEI; ASANO, SHIGEHIRO; HARA, TOKUMASA
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 033840/0783 →
Priority Claims (1)
JP 2013-169880 · Aug 19, 2013 · national
Continuity (1)
Related Publication 20150052417A1 · Feb 19, 2015