IP Library Granted Patent US 8,966,165
Granted Patent B2
US 8,966,165 · App. 14/467,322 · Granted Feb 24, 2015

Translation layer in a solid state storage device

Inventor: Troy Manning (Meridian, ID)
Assignee: Micron Technology, Inc.
G06F12/0246G06F2212/7208G11C16/102
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Quick Facts
Patent No.
US 8,966,165
App. No.
14/467,322
Granted
Feb 24, 2015
Kind
B2
Abstract

Solid state storage devices and methods for flash translation layers are disclosed. In one such translation layer, a sector indication is translated to a memory location by a parallel unit look-up table is populated by memory device enumeration at initialization. Each table entry is comprised of communication channel, chip enable, logical unit, and plane for each operating memory device found. When the sector indication is received, a modulo function operates on entries of the look-up table in order to determine the memory location associated with the sector indication.

Claims (45)

1. A method of operating solid state device, the method comprising:

enumerating memory devices of the solid state device and a location of each enumerated memory device;

determining a target memory device of the enumerated memory devices in response to a sector identifier and the enumerated memory device locations; and

generating a data block look-up table comprising a group of logical block addresses in the target memory device, each logical block address associated with a different data block look-up table entry, each data block look-up table entry comprising a first portion configured to indicate a highest programmed page of a memory block indicated by the associated logical block address and a second portion that is different from the first portion and that is configured to indicate that the memory block is ordered when the memory block is ordered and to indicate that the memory block is not ordered when the memory block is not ordered.

2. The method of claim 1 , wherein the sector identifier is a sector number that is part of a sector request that also comprises a command.

3. The method of claim 1 , wherein the command is a read or a write command.

4. The method of claim 1 , wherein enumerating the memory devices and the memory device location comprises determining a communication channel, chip enable, logical unit, and plane for each of the enumerated memory devices.

5. The method of claim 1 , wherein enumerating memory devices of the solid state device and a location of each enumerated memory device comprises generating a table that enumerates the memory devices and the memory device locations before generating the data block look-up table.

6. The method of claim 1 , further comprising, before generating a data block look-up table:

receiving the sector identifier;

surveying the solid state device for memory devices and location characteristics of each memory device; and

populating a memory device table that enumerates the memory devices and location characteristics of each enumerated memory device.

7. The method of claim 6 , wherein surveying the solid state device comprises determining a communication channel, a chip enable, a logical unit, and a plane for each enumerated memory device.

8. The method of claim 7 , wherein populating the memory device table comprises assigning a unique identifier to each enumerated memory device.

9. The method of claim 6 , wherein each memory device table entry is comprised of communication channel information, chip enable information, logical unit information, memory device plane information, and memory device status information.

10. The method of claim 1 , wherein the data block look-up table comprises indications of which sector identifiers are stored in the target memory device.

11. A method of operating a solid state device, the method comprising:

determining the existence of memory devices within the solid state device and determining information about a memory location for each memory device determined to exist within the solid state device;

generating a memory device table that enumerates the memory devices determined to exist within the solid state device and the information about the memory location for each memory device determined to exist within the solid state device, the memory device table comprising memory device identifiers assigned to each memory device enumerated in the memory device table;

locating a target memory device in the memory device table, on the basis of the memory device identifiers of the memory device table, corresponding to a sector identifier and the memory location of the target memory device;

generating a data block look-up table comprising a group of logical block addresses in the target memory device, each logical block address associated with a different data block look-up table entry, each entry comprising a first portion configured to indicate a highest programmed page of a memory block indicated by the associated logical block address and a second portion that is different from the first portion and that is configured to indicate that the memory block is ordered when the memory block is ordered and to indicate that the memory block is not ordered when the memory block is not ordered; and

locating a target data block in the data block look-up table containing a logical block address corresponding to the sector identifier.

12. The method of claim 11 , further comprising receiving the sector identifier from a host.

13. The method of claim 11 , wherein the information about the memory location for each memory device determined to exist within the solid state device comprises communication channel information, chip enable information, logical unit information, and plane information.

14. The method of claim 13 , wherein a plurality of different memory devices determined to exist within the solid state device have the same chip enable information.

15. The method of claim 13 , wherein a plurality of different memory devices determined to exist within the solid state device have the same channel information.

16. The method of claim 13 , wherein generating the memory device table that enumerates the memory devices determined to exist within the solid state device and the information about the memory location for each memory device determined to exist within the solid state device comprises populating the memory device table with the memory device identifiers and the information about the memory location for each memory device determined to exist within the solid state device.

17. The method of claim 11 , wherein the logical block address corresponding to the sector identifier is shifted a plurality of times, in response to a quantity of logical block addresses per page.

18. The method of claim 11 , wherein the data block look-up table is generated using a modulo function.

19. A solid state device comprising:

a controller;

wherein the controller is configured to enumerate memory devices of the solid state device and a location of each enumerated memory device;

wherein the controller is configured to determine a target memory device of the enumerated memory devices in response to a sector identifier and the enumerated memory device locations; and

wherein the controller is configured to generate a data block look-up table comprising a group of logical block addresses in the target memory device, each logical block address associated with a different data block look-up table entry, each data block look-up table entry comprising a first portion configured to indicate a highest programmed page of a memory block indicated by the associated logical block address and a second portion that is different from the first portion and that is configured to indicate that the memory block is ordered when the memory block is ordered and to indicate that the memory block is not ordered when the memory block is not ordered.

20. The solid state device of claim 19 , wherein the controller being configured to enumerate memory devices of the solid state device and a location of each enumerated memory device comprises the controller being configured to generate a table that enumerates the memory devices and the memory device locations before generating the data block look-up table.

21. The solid state device of claim 19 , wherein the controller is configured to execute a modulo function to generate the data block look-up table.

22. The solid state device of claim 19 , wherein the controller is configured to generate a location of the target memory array by shifting a logical block address, corresponding to the sector identifier, a plurality of times, in response to a quantity of logical block addresses per page.

23. A solid state device comprising:

a controller;

wherein the controller is configured to determine the existence of memory devices within the solid state device and to determine information about a memory location for each memory device determined to exist within the solid state device;

wherein the controller is configured to generate a memory device table that enumerates the memory devices determined to exist within the solid state device and the information about the memory location for each memory device determined to exist within the solid state device, the memory device table comprising memory device identifiers assigned to each memory device enumerated in the memory device table;

wherein the controller is configured to locate a target memory device in the memory device table, on the basis of the memory device identifiers of the memory device table, corresponding to a sector identifier and the memory location of the target memory device;

wherein the controller is configured to generate a data block look-up table comprising a group of logical block addresses in the target memory device, each logical block address associated with a different data block look-up table entry, each entry comprising a first portion configured to indicate a highest programmed page of a memory block indicated by the associated logical block address and a second portion that is different from the first portion and that is configured to indicate that the memory block is ordered when the memory block is ordered and to indicate that the memory block is not ordered when the memory block is not ordered; and

wherein the controller is configured to locate a target data block in the data block look-up table containing a logical block address corresponding to the sector identifier.

24. The solid state device of claim 23 , wherein the controller being configured to generate the memory device table that enumerates the memory devices determined to exist within the solid state device and the information about the memory location for each memory device determined to exist within the solid state device comprises the controller being configured to populate the memory device table with the memory device identifiers and the information about the memory location for each memory device determined to exist within the solid state device.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Continuity (2)
Continuation 12250043 · Oct 13, 2008
Related Publication 20140365720A1 · Dec 11, 2014