IP Library Granted Patent US 9,116,869
Granted Patent B2
US 9,116,869 · App. 14/467,604 · Granted Aug 25, 2015

Posting interrupts to virtual processors

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Quick Facts
Patent No.
US 9,116,869
App. No.
14/467,604
Granted
Aug 25, 2015
Kind
B2
Abstract

Embodiments of systems, apparatuses, and methods for posting interrupts to virtual processors are disclosed. In one embodiment, an apparatus includes look-up logic and posting logic. The look-up logic is to look-up an entry associated with an interrupt request to a virtual processor in a data structure. The posting logic is to post the interrupt request in a data structure specified by information in the first data structure.

Claims (29)

1. An apparatus comprising:

look-up logic to look up an entry associated with an interrupt request to a virtual processor in a first data structure; and

posting logic to post the interrupt request in a second data structure specified by first information in the first data structure and to use second information from the second data structure, including an indication of whether a notify event is suppressed, to determine whether to generate the notify event to a physical processor, the notify event to indicate that an interrupt request is posted for the virtual processor.

2. The apparatus of claim 1 , wherein the first information includes the address of the second data structure.

3. The apparatus of claim 1 , wherein the second data structure is to include a plurality of posted-interrupt request indicators, each of the plurality of posted-interrupt request indicators corresponding to one of a plurality of virtual interrupt vectors associated with the virtual processor.

4. The apparatus of claim 1 , wherein the second data structure is to include an identifier of the physical processor.

5. The apparatus of claim 1 , wherein the notify event is an interrupt request to the physical processor.

6. The apparatus of claim 5 , wherein the second data structure is to include a physical interrupt vector to be included in an interrupt message to the physical processor.

7. The apparatus of claim 1 , wherein the second information also includes an indication of whether a previous interrupt request to the virtual processor is pending.

8. A method comprising:

moving a virtual processor from an active state to a runnable state;

programming an indicator in a second data structure to suppress a notify event;

receiving an interrupt request to the virtual processor;

looking up an entry in a first data structure based on an index value provided in the interrupt request;

finding a second data structure based on the an address provided in the entry;

posting the interrupt request in the second data structure; and

suppressing sending the notify event, the notify event to indicate the posting of the interrupt request.

9. The method of claim 8 , wherein posting the interrupt request includes setting one of a plurality of posted-interrupt request indicators, each of the plurality of posted-interrupt request indicators corresponding to one of a plurality of virtual interrupt vectors associated with the virtual processor.

10. The method of claim 9 , wherein the one of the plurality of posted-interrupt request indicators corresponds to a virtual interrupt vector provided in the entry.

11. The method of claim 8 , wherein the notify event is an interrupt request to a first physical processor.

12. The method of claim 11 , further comprising storing an identifier of the first physical processor in the second data structure prior to sending the notify event.

13. The method of claim 12 , further comprising migrating the virtual processor to a second physical processor after sending the notify event, including storing an identifier of the second physical processor in the second data structure.

14. The method of claim 12 , wherein posting the interrupt request in the second data structure is performed in an atomic operation.

15. A system comprising:

a physical processor to support a virtualization environment to run a virtual processor;

a device to generate an interrupt request to the virtual processor;

look-up logic to look up an entry associated with the interrupt request in a first data structure;

posting logic to post the interrupt request to a second data structure specified by first information in the first data structure, and to use second information from the second data structure, including an indication of whether a notification event is suppressed, to determine whether to generate the notification event to the physical processor, the notification event to indicate that an interrupt request is posted for the virtual processor; and

a memory to store the data structure.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →