IP Library › Granted Patent US 9,484,946
Granted Patent B2
US 9,484,946 · App. 14/468,078 · Granted Nov 1, 2016

Digital-to-analog converter (DAC), method for operating a DAC and transceiver circuit

Inventors: Mattieu Deloge (Eindhoven, NL); Arnoud Pieter van der Wel (Eindhoven, NL)
Assignee: NXP B.V.
H03M1/661H03M1/0881H04B1/38H03M1/745
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Quick Facts
Patent No.
US 9,484,946
App. No.
14/468,078
Granted
Nov 1, 2016
Kind
B2
Abstract

Embodiments of digital-to-analog converters (DACs), methods for operating a DAC, and transceiver circuits are described. In one embodiment, a DAC includes an input terminal configured to receive a digital signal, a converter circuit configured to convert the digital signal into an analog signal using first-order interpolation allowing low electromagnetic emissions, and an output terminal configured to output the analog signal. Other embodiments are also described.

Claims (43)

1. A digital-to-analog converter (DAC), the DAC comprising:

an input terminal configured to receive a digital signal;

a converter circuit configured to convert the digital signal into an analog signal using first-order interpolation to shape the analog signal by shaping transition edges of the digital signal, wherein the converter circuit comprises a plurality of DAC cells, each of the DAC cells includes a pair of transistors and a current source connected to the pair of transistors and a fixed voltage; and

an output terminal configured to output the analog signal.

2. The DAC of claim 1 , wherein the converter circuit further comprises:

a current mirror circuit connected to each of the DAC cells.

3. The DAC of claim 1 , wherein the pair of transistors comprises:

gate terminals configured to receive a differential signal; and

source terminals or drain terminals configured to receive a current or to output a current.

4. The DAC of claim 3 , wherein the converter circuit further comprises:

a current mirror circuit connected to each of the DAC cells, wherein the current mirror circuit comprises a second pair of transistors, and wherein the second pair of transistors comprises:

gate terminals connected to each other; and

source terminals or drain terminals configured to receive the current from each of the DAC cells or to output the analog signal, wherein the analog signal comprises an output current.

5. The DAC of claim 1 , wherein the pair of transistors of each of the DAC cells is configured to receive a unique differential signal.

6. The DAC of claim 1 , wherein the converter circuit comprises:

a plurality of sets of current sources and selection switches;

a switch connected to the sets of current sources and selection switches; and

an output capacitor connected to the switch.

7. The DAC of claim 6 , wherein the output capacitor is configured to be charged or discharged by the current sources in response to a toggling of the switch.

8. The DAC of claim 6 , wherein the converter circuit further comprises:

a plurality of shift registers configured to generate driving signals for the selection switches in response to a toggling of the switch.

9. The DAC of claim 6 , wherein the switch is a 3-position switch.

10. A transceiver circuit comprising the DAC of claim 1 .

11. A method for operating a digital-to-analog converter (DAC), the method comprising:

receiving a digital signal;

converting the digital signal into an analog signal using first-order interpolation to shape the analog signal by shaping transition edges of the digital signal, wherein the converting is performed by a converter circuit that includes a plurality of DAC cells, each of the DAC cells includes a pair of transistors and a current source connected to the pair of transistors and a fixed voltage; and

outputting the analog signal.

12. The method of claim 11 , wherein converting the digital signal into the analog signal using first-order interpolation comprises:

driving the plurality of DAC cells with differential signals.

13. The method of claim 11 , wherein converting the digital signal into the analog signal using first-order interpolation comprises:

charging or discharging a capacitor using multiple current sources.

14. A transceiver circuit, the transceiver circuit comprising a receiver section and a transmitter section for connection to a single-ended communications bus, the transmitter section comprises:

a digital-to-analog converter (DAC), the DAC comprising:

an input terminal configured to receive a digital signal;

a converter circuit configured to convert the digital signal into an analog signal using first-order interpolation to shape the analog signal by shaping transition edges of the digital signal, wherein the converter circuit includes plurality of DAC cells, each of the DAC cells includes a pair of transistors and a current source connected to the pair of transistors and a fixed voltage; and

an output terminal configured to output the analog signal.

15. The transceiver circuit of claim 14 , wherein the converter circuit comprises

a current mirror circuit connected to each of the DAC cells.

16. The transceiver circuit of claim 14 , wherein the converter circuit comprises:

a plurality of sets of current sources and selection switches;

a 3-position switch connected to the sets of current sources and selection switches;

an output capacitor connected to the 3-position switch and configured to be charged or discharged by the current sources in response to a toggling of the 3-position switch; and

a plurality of shift registers configured to generate driving signals for the selection switches in response to the toggling of the 3-position switch.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2014
From: DELOGE, MATTHIEU; VAN DER WEL, ARNOUD PIETER
To: NXP B.V.
Reel/Frame 033604/0744 →
Continuity (1)
Related Publication 20160056832A1 · Feb 25, 2016