SEMICONDUCTOR DEVICE
A semiconductor device comprises: a semiconductor element; a support substrate arranged on a surface of the semiconductor element opposite to a surface thereof provided with a pad, the support substrate being wider in area than the semiconductor element; a burying insulating layer on the support substrate for burying the semiconductor element therein; a fan-out interconnection led out from the pad to an area on the burying insulating layer lying more peripherally outwardly than the semiconductor element; and a reinforcement portion arranged in a preset area on top of outer periphery of the semiconductor element for augmenting the mechanical strength of the burying insulating layer and the fan-out interconnection.
1 . A semiconductor device comprising:
a semiconductor element;
a support substrate arranged on a surface of said semiconductor element opposite to a surface thereof provided with a pad; said support substrate being bigger in area than said semiconductor element;
a burying insulating layer on said support substrate for burying said semiconductor element therein;
a fan-out interconnection led out from said pad to an area on said burying insulating layer extending to an area lying more peripherally outwardly than said semiconductor element; and
a reinforcement portion via interconnection connected to at least one end of said semiconductor element without being connected to said fan-out interconnection.
2 . The semiconductor device according to claim 1 , wherein
said reinforcement portion via interconnection is formed of the same material as that of said fan-out interconnection.
3 . The semiconductor device according to claim 1 , wherein
said reinforcement portion via interconnection has a modulus of elasticity higher than that of said fan-out interconnection.
4 . The semiconductor device according to claim 1 , wherein
said reinforcement portion is arranged in an area extending outwardly from a location directly above the outer periphery of said semiconductor element.
5 . The semiconductor device according to claim 1 , wherein
said reinforcement portion is arranged in an area extending by a distance up to twice a thickness of said semiconductor element from a location lying directly above an outer periphery of said semiconductor element.