IP Library › Granted Patent US 9,231,208
Granted Patent B2
US 9,231,208 · App. 14/474,883 · Granted Jan 5, 2016

Method for forming memory device

Inventors: Meng-Heng Lin (Taichung, TW); Bo-Lun Wu (Changhua County, TW)
Assignee: WINBOND ELECTRONICS CORP.
H01L45/1641H01L45/1233H01L45/146
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Quick Facts
Patent No.
US 9,231,208
App. No.
14/474,883
Granted
Jan 5, 2016
Kind
B2
Abstract

A method includes forming a resistance-switching layer and a second electrode over a first electrode. The method includes applying a forming voltage to the resistance-switching layer such that the resistance of the resistance-switching layer is decreased. The method includes applying an initial reset voltage to the first electrode or the second electrode such that the resistance of the resistance-switching layer is increased. The method includes applying a first set voltage to the first electrode or the second electrode such that the resistance of the resistance-switching layer is decreased. The method includes applying a second reset voltage to first electrode or the second electrode such that the resistance of the resistance-switching layer is increased. The method includes applying a second set voltage to first electrode or the second electrode such that the resistance of the resistance-switching layer is decreased. The second set voltage is lower than the first set voltage.

Claims (27)

1. A method for forming a memory device, comprising:

forming a resistance-switching layer over a first electrode;

forming a second electrode over the resistance-switching layer;

applying a forming voltage to the resistance-switching layer such that the resistance of the resistance-switching layer is decreased;

after the forming voltage is applied, applying an initial reset voltage to the first electrode or the second electrode such that the resistance of the resistance-switching layer is increased;

after the initial reset voltage is applied, applying a first set voltage to the first electrode or the second electrode such that the resistance of the resistance-switching layer is decreased;

after the first set voltage is applied, applying a second reset voltage to the first electrode or the second electrode such that the resistance of the resistance-switching layer is increased; and

after the second reset voltage is applied, applying a second set voltage to the first electrode or the second electrode such that the resistance of the resistance-switching layer is decreased, wherein the second set voltage is lower than the first set voltage.

2. The method for forming a memory device as claimed in claim 1 , wherein the forming voltage is higher than the first set voltage.

3. The method for forming a memory device as claimed in claim 1 , wherein the amount of the second set voltage is in a range from about 30% to about 80% of the amount of the first set voltage.

4. The method for forming a memory device as claimed in claim 1 , wherein the first set voltage is higher than the second set voltage by about 1 volt to about 2 volts.

5. The method for forming a memory device as claimed in claim 1 , further comprising applying a third reset voltage to the first electrode or the second electrode after the second set voltage is applied.

6. The method for forming a memory device as claimed in claim 1 , further comprising repeatedly applying a third reset voltage to the first electrode or the second electrode after the second set voltage is applied.

7. The method for forming a memory device as claimed in claim 6 , further comprising baking the resistance-switching layer.

8. The method for forming a memory device as claimed in claim 1 , wherein the first set voltage and the second set voltage have the same polarity.

9. The method for forming a memory device as claimed in claim 1 , wherein the second set voltage and the second reset voltage have opposite polarities.

10. The method for forming a memory device as claimed in claim 1 , further comprising applying a voltage to the first electrode or the second electrode before the forming voltage is applied, wherein the voltage is lower than the forming voltage, and the voltage and the forming voltage have the same polarity.

11. The method for forming a memory device as claimed in claim 1 , wherein the resistance-switching layer comprises hafnium oxide, zirconium oxide, titanium oxide, tantalum oxide, tungsten oxide, aluminum oxide, zinc oxide, nickel oxide, copper oxide, other suitable material, or a combination thereof.

12. A method for forming a memory device, comprising:

forming a resistance-switching layer over a first electrode;

forming a second electrode over the resistance-switching layer;

performing a forming process to the resistance-switching layer;

initially resetting the resistance-switching layer;

setting the resistance-switching layer by applying a set voltage to first electrode or the second electrode;

resetting the resistance-switching layer again after the step of setting the resistance-switching layer; and

applying a voltage to the first electrode or the second electrode after the step of resetting the resistance-switching layer again, wherein the voltage is lower than the set voltage.

13. The method for forming a memory device as claimed in claim 12 , wherein the resistance-switching layer comprises hafnium oxide, zirconium oxide, titanium oxide, tantalum oxide, tungsten oxide, aluminum oxide, zinc oxide, nickel oxide, copper oxide, other suitable material, or a combination thereof.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 2, 2014
From: LIN, MENG-HENG; WU, BO-LUN
To: WINBOND ELECTRONICS CORP.
Reel/Frame 033652/0635 →
Priority Claims (1)
TW 103112803 A · Apr 8, 2014 · national
Continuity (1)
Related Publication 20150287919A1 · Oct 8, 2015