IP Library Granted Patent US 9,716,225
Granted Patent B2
US 9,716,225 · App. 14/476,312 · Granted Jul 25, 2017

Memory cells including dielectric materials, memory devices including the memory cells, and methods of forming same

Inventors: Tsz W. Chan (Boise, ID); D. V. Nirmal Ramaswamy (Boise, ID); Qian Tao (Boise, ID); Yongjun Jeff Hu (Boise, ID); Everett A. McTeer (Eagle, ID)
Assignee: Micron Technology, Inc.
H01L45/145H01L27/2427H01L45/04H01L45/1253H01L45/141H01L45/1608
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Quick Facts
Patent No.
US 9,716,225
App. No.
14/476,312
Granted
Jul 25, 2017
Kind
B2
Abstract

A memory cell comprising a threshold switching material over a first electrode on a substrate. The memory cell includes a second electrode over the threshold switching material and at least one dielectric material between the threshold switching material and at least one of the first electrode and the second electrode. A memory material overlies the second electrode. The dielectric material may directly contact the threshold switching material and each of the first electrode and the second electrode. Memory cells including only one dielectric material between the threshold switching material and an electrode are disclosed. A memory device including the memory cells and methods of forming the memory cells are also described.

Claims (41)

1. A memory cell, comprising:

a threshold switching material comprising amorphous silicon and at least one of carbon, oxygen, or nitrogen between a pair of electrodes, wherein each electrode of the pair of electrodes comprises polysilicon, tungsten, platinum, palladium, tantalum, nickel, tantalum nitride, tungsten nitride, a metal silicide, or combinations thereof;

at least one doped dielectric material between the threshold switching material and at least one electrode of the pair of electrodes, the threshold switching material over the at least one doped dielectric material; and

a memory material adjacent at least one of the electrodes of the pair of electrodes.

2. The memory cell of claim 1 , wherein the each electrode of the pair of electrodes comprises the same material.

3. The memory cell of claim 1 , wherein the at least one doped dielectric material comprises aluminum oxide.

4. The memory cell of claim 1 , wherein the at least one electrode of the pair of electrodes comprises a metal material in contact with the at least one doped dielectric material.

5. The memory cell of claim 1 , further comprising another dielectric material overlying the threshold switching material.

6. The memory cell of claim 1 , further comprising another electrode on a side of the memory material opposite the at least one electrode of the pair of electrodes.

7. The memory cell of claim 1 , wherein the at least one dielectric material between the threshold switching material and at least one electrode of the pair of electrodes is in direct contact with the threshold switching material.

8. A memory cell, comprising:

a threshold switching material over a first electrode comprising carbon on a substrate;

a second electrode over the threshold switching material;

at least one dielectric material between the threshold switching material and at least one of the first electrode or the second electrode, wherein at least a portion of the at least one dielectric material is doped; and

a memory material over the second electrode.

9. The memory cell of claim 8 , wherein the threshold switching material comprises a chalcogenide material.

10. The memory cell of claim 8 , wherein the threshold switching material comprises arsenic, selenium, silicon, and germanium.

11. The memory cell of claim 8 , wherein the at least one dielectric material comprises aluminum oxide, aluminum silicon oxide, strontium oxide, barium oxide, strontium titanium oxide, magnesium oxide, a refractory metal oxide, a refractory metal alloy oxide, or combinations thereof.

12. The memory cell of claim 8 , wherein the at least one dielectric material has a thickness of between about 3 Å and about 50 Å.

13. The memory cell of claim 8 , wherein the at least one dielectric material is between the threshold switching material and the first electrode.

14. The memory cell of claim 8 , wherein the at least one dielectric material is between the threshold switching material and the second electrode.

15. The memory cell of claim 8 , wherein a first dielectric material of the at least one dielectric material is between the threshold switching material and the first electrode and a second dielectric material of the at least one dielectric material is between the threshold switching material and the second electrode.

16. A method of forming a memory cell, the method comprising:

forming a threshold switching material over a first electrode comprising carbon on a substrate;

forming a second electrode over the threshold switching material;

forming a dielectric material between the threshold switching material and at least one of the first electrode or the second electrode;

doping at least a portion of the dielectric material; and

forming a memory material over the second electrode.

17. The method of claim 16 , wherein forming a threshold switching material over a first electrode comprising carbon on a substrate comprises forming the threshold switching material comprising a chalcogenide material over the first electrode.

18. The method of claim 16 , wherein forming a threshold switching material over a first electrode comprising carbon on a substrate comprises forming the threshold switching material without substantially reacting the threshold switching material with the first electrode.

19. The method of claim 16 , wherein forming a second electrode comprises forming the second electrode from the same material as the first electrode.

20. The method of claim 16 , wherein forming a dielectric material between the threshold switching material and at least one of the first electrode or the second electrode comprises at least one of:

forming a first dielectric material between the threshold switching material and the first electrode; and

forming a second dielectric material between the threshold switching material and the second electrode.

21. The method of claim 16 , wherein forming a dielectric material comprises forming between about 3 Å and about 50 Å of the dielectric material in contact with the threshold switching material.

22. The method of claim 16 , wherein forming a dielectric material comprises forming a dielectric material comprising aluminum oxide, aluminum silicon oxide, strontium oxide, barium oxide, strontium titanium oxide, magnesium oxide, a refractory metal oxide, a refractory metal alloy oxide, or combinations thereof.

23. The memory cell of claim 1 , wherein a thickness of the at least one doped dielectric material is between about 3 Å and about 5 Å.

24. The memory cell of claim 1 , wherein the threshold switching material is doped with at least one of boron, aluminum, gallium, or phosphorus.

25. The memory cell of claim 1 , wherein the at least one doped dielectric material is doped with oxygen, sulfur, carbon, fluorine, a metallic element, or combinations thereof.

26. The memory cell of claim 1 , wherein the at least one doped dielectric material is between the threshold switching material and one electrode of the pair of electrodes, the other electrode of the pair of electrodes in direct contact with the threshold switching material.

27. The memory cell of claim 1 , wherein the at least one doped dielectric material comprises aluminum silicon oxide, strontium oxide, barium oxide, strontium titanium oxide, or combinations thereof.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2014
From: CHAN, TSZ W.; RAMASWAMY, D.V. NIRMAL; TAO, QIAN; HU, YONGJUN JEFF; MCTEER, EVERETT A.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 033661/0216 →
Continuity (1)
Related Publication 20160064666A1 · Mar 3, 2016