IP Library › Granted Patent US 9,218,485
Granted Patent B2
US 9,218,485 · App. 14/483,450 · Granted Dec 22, 2015

Program execution device

Inventors: Hideki Matsushima (Osaka, JP); Teruto Hirota (Osaka, JP); Yukie Shoda (Osaka, JP); Shunji Harada (Osaka, JP)
Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
G06F21/53G06F21/14G06F21/57H04L63/105G06F2221/2153
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Quick Facts
Patent No.
US 9,218,485
App. No.
14/483,450
Granted
Dec 22, 2015
Kind
B2
Abstract

A program execution device capable of protecting a program against unauthorized analysis and alteration is provided. The program execution device includes an execution unit, a first protection unit, and a second protection unit. The execution unit executes a first program and a second program, and is connected with an external device that is capable of controlling the execution. The first protection unit disconnects the execution unit from the external device while the execution unit is executing the first program. The second protection unit protects the first program while the execution unit is executing the second program.

Claims (24)

1. An information processing device comprising:

a storage operable to store a first set of program instructions including one or more program instructions for detecting a tampering of a second set of program instructions; and

a controller operable to (i) read the one or more program instructions of the first set of program instructions from the storage, (ii) judge whether or not at least part of the second set of program instructions is tampered with, by executing the one or more program instructions of the first set of program instructions in a secure processing mode, so as to execute, when it is judged that the second set of program instructions has not been tampered with, one or more program instructions of the second set of program instructions,

wherein, in the secure processing mode, the controller is operable to perform processing with a high level of security so that data of the storage cannot be accessed from outside.

2. The information processing device of claim 1 ,

wherein the first set of program instructions include one or more program instructions for detecting a tampering by using a stored digital signature for the second set of program instructions.

3. The information processing device of claim 1 ,

wherein, in the secure processing mode, the controller is operable to perform processing with a high level of security so that data of the storage cannot be accessed from an external device.

4. The information processing device of claim 1 ,

wherein the information processing device operates in one of a plurality of operation modes that include the secure processing mode and a normal mode,

in the normal mode, the controller is operable to perform processing with a lower level of security than the high level of security, and

the controller changes the operation mode of the information processing device to the secure processing mode and judges in the secure processing mode.

5. The information processing device comprising:

a storage operable to store a first set of program instructions including one or more program instructions for detecting a tampering, and a second set of program instructions; and

a controller operable to (i) read the one or more program instructions of the first set of program instructions from the storage, (ii) judge whether or not at least part of the second set of program instructions is tampered with, by executing the one or more program instructions of the first set of program instructions in a secure processing mode, and (iii) execute, when it is judged that the second set of program instructions has not been tampered with, one or more program instructions of the second set of program instructions,

wherein, in the secure processing mode, the controller is operable to perform processing with a high level of security so that data of the storage cannot be accessed from outside.

6. The information processing device of claim 5 ,

wherein the first set of program instructions include one or more program instructions for detecting a tampering by using a stored digital signature for the second set of program instructions.

7. The information processing device of claim 5 ,

wherein, in the secure processing mode, the controller is operable to perform processing with a high level of security so that data of the storage cannot be accessed from an external device.

8. The information processing device of claim 5 ,

wherein the information processing device operates in one of a plurality of operation modes that include the secure processing mode and a normal mode,

in the normal mode, the controller is operable to perform processing with a lower level of security than the high level of security, and

the controller changes the operation mode of the information processing device to the secure processing mode and judges in the secure processing mode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2022
From: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
To: PANASONIC HOLDINGS CORPORATION
Reel/Frame 060361/0369 →
Priority Claims (1)
JP 2003-301554 · Aug 26, 2003 · national
Continuity (5)
Continuation 13952244 · Jul 26, 2013
Continuation 13441261 · Apr 6, 2012
Division 12367076 · Feb 6, 2009
Continuation 10569414
Related Publication 20140380503A1 · Dec 25, 2014