IP Library › Granted Patent US 9,023,717
Granted Patent B2
US 9,023,717 · App. 14/485,649 · Granted May 5, 2015

Method for manufacturing semiconductor device

Inventors: Kazuyuki Nakagawa (Kanagawa, JP); Shunichi Abe (Kanagawa, JP)
Assignee: Renesas Electronics Corporation
H01L21/78H01L2223/54473H01L2223/5448H01L22/32H01L2223/5446H01L2223/54453
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Quick Facts
Patent No.
US 9,023,717
App. No.
14/485,649
Granted
May 5, 2015
Kind
B2
Abstract

To provide a semiconductor device having improved reliability. A method of manufacturing a semiconductor device according to one embodiment includes a step of cutting, in a dicing region arranged between two chip regions adjacent to each other, a wafer along an extending direction of the dicing region. The dicing region has therein a plurality of metal patterns in a plurality of columns. In the step of cutting the wafer, one or more of the columns of metal patterns formed in a plurality of columns are removed, and the metal patterns of the column(s) different from the above-mentioned one or more of the columns are not removed.

Claims (45)

1. A method of manufacturing a semiconductor device, comprising the steps of:

(a) providing a semiconductor wafer having a first chip region, a second chip region arranged adjacent to the first chip region in plan view, a dicing region arranged between the first chip region and the second chip region in plan view, and a plurality of metal patterns arranged in a plurality of columns in the dicing region and arranged along an extending direction of the dicing region; and

(b) cutting, in the dicing region of the semiconductor wafer, the semiconductor wafer along the extending direction of the dicing region,

wherein the metal patterns have a first-column pattern arranged in a column closest to the first chip region and second column patterns arranged in a column further from the first chip region than the first column pattern,

wherein a distance between the first chip region and the first column pattern is smaller than a distance between the first column pattern and the second column pattern and is smaller than a distance between the second chip region and the second column pattern, and

wherein in the step (b), the first column pattern is not removed, but the second column pattern is removed.

2. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the step (b) comprises a step of transferring a dicing blade along the extending direction of the dicing region without bringing the dicing blade into contact with the first column pattern and thereby machining and cutting the semiconductor wafer.

3. The method of manufacturing a semiconductor device according to claim 2 ,

wherein the step (b) comprises a step of irradiating the dicing region with a laser light to remove the second column pattern before machining the semiconductor wafer with the dicing blade, and

wherein the second column pattern is irradiated with the laser light while preventing the first column pattern from being irradiated therewith.

4. The method of manufacturing a semiconductor device according to claim 3 ,

wherein the semiconductor wafer has a semiconductor substrate and a plurality of wiring layers stacked one after another over a main surface of the semiconductor substrate, and

wherein in the step (b), the second column pattern is removed by irradiation with the laser light to expose the main surface of the semiconductor substrate.

5. The method of manufacturing a semiconductor device according to claim 3 ,

wherein in the step (b), the dicing blade is inserted into a groove formed by irradiation with the laser light.

6. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the first chip region and the second chip region each have, at the respective peripheral portions thereof, a plurality of electrode pads and a metal member continuously surrounding therewith a region in which the electrode pads are arranged.

7. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the metal patterns further have a third column pattern arranged between the second column pattern and the second chip region,

wherein a distance between the second chip region and the third column pattern is smaller than a distance between the third column pattern and the second column pattern and is smaller than a distance between the first chip region and the second column pattern, and

wherein in the step (b), the third column pattern remains without being removed.

8. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the first column pattern, among the metal patterns, is covered with an insulating film having a resin.

9. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the first chip region and the second chip region each have an electrode pad, a redistribution layer connected with the electrode pad, an insulating film covering the redistribution layer therewith, and a protruding electrode to be connected with a portion of the redistribution layer at an opening portion formed in the insulating film,

wherein the protruding electrode and a portion of the redistribution layer are connected with each other via a gold film formed by a electroplating method, and

wherein the metal patterns are each covered with the insulating film.

10. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the step (a) comprises a step of bringing a contact terminal into contact with the metal patterns and thereby making a test.

11. The method of manufacturing a semiconductor device according to claim 1 , further comprising the step of:

(c) providing a wiring substrate having a chip mounting surface and mounting the semiconductor chip obtained in the step (b) over the chip mounting surface of the wiring substrate.

12. The method of manufacturing a semiconductor device according to claim 11 ,

wherein the semiconductor chip has a surface, a plurality of protruding electrodes formed over the surface, and a back surface positioned on a side opposite to the surface, and

wherein in the step (c), the semiconductor chip and the wiring substrate are electrically connected with each other via the protruding electrodes while facing the surface of the semiconductor chip to the chip mounting surface of the wiring substrate.

13. The method of manufacturing a semiconductor device according to claim 1 ,

wherein the step (b) comprises a step of irradiating the dicing region with a laser light to remove the second column pattern, and

wherein the second column pattern is irradiated with the laser light without irradiating the first column pattern therewith.

14. A method of manufacturing a semiconductor device, comprising the steps of:

(a) providing a semiconductor wafer having a first chip region, a second chip region arranged adjacent to the first chip region in plan view, a dicing region arranged between the first chip region and the second chip region in plan view, and a plurality of metal patterns arranged in a plurality of columns in the dicing region and arranged along an extending direction of the dicing region; and

(b) cutting, in the dicing region of the semiconductor wafer, the semiconductor wafer along the extending direction of the dicing region,

wherein the metal patterns have a first-column pattern arranged in a column closest to the first chip region, second column patterns arranged in a column closest to the second chip region, and third column patterns arranged between the first column pattern and the second column pattern,

wherein a distance between the first chip region and the first column pattern is smaller than a distance between the first column pattern and the third column pattern and is smaller than a distance between the second column pattern and the third column pattern,

wherein a distance between the second chip region and the second column pattern is smaller than a distance between the second column pattern and the third column pattern and is smaller than a distance between the first column pattern and the third column pattern, and

wherein in the step (b), neither the first column pattern nor the second column pattern is removed and the third column pattern is removed.

Assignments (2)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 12, 2014
From: NAKAGAWA, KAZUYUKI; ABE, SHUNICHI
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 033735/0397 →
Continuity (1)
Related Publication 20150079762A1 · Mar 19, 2015