IP Library Granted Patent US 9,478,453
Granted Patent B2
US 9,478,453 · App. 14/488,496 · Granted Oct 25, 2016

Sacrificial carrier dicing of semiconductor wafers

Inventors: Richard S. Graf (Gray, ME); Douglas O. Powell (Endicott, NY); David J. Russell (Owego, NY); David J. West (Essex Junction, VT)
Assignee: International Business Machines Corporation
H01L21/6835H01L21/2686H01L21/304H01L21/67092H01L21/67115H01L21/6836H01L21/78H01L23/544H01L2221/68318H01L2221/68327H01L2221/68381H01L2223/54453
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Quick Facts
Patent No.
US 9,478,453
App. No.
14/488,496
Granted
Oct 25, 2016
Kind
B2
Abstract

Mechanisms are provided for sacrificial carrier dicing of semiconductor wafers. A bottom layer of a semiconductor wafer is bonded to a top layer of a sacrificial carrier. The semiconductor wafer is diced into a set of chips, such that the dicing cuts through the semiconductor wafer and into the sacrificial carrier and such that the sacrificial carrier dresses a diamond blade of a saw so as to expose one or more new, sharp layers of diamonds on the diamond blade.

Claims (25)

1. A sacrificial carrier dicing structure, the sacrificial carrier dicing structure comprising:

a bottom layer of a semiconductor wafer bonded to a top layer of the sacrificial carrier using adhesive film;

the bottom layer of the semiconductor wafer coupled to the top layer of the sacrificial carrier using a vacuum force, wherein the vacuum force is generated on the bottom layer of the semiconductor wafer through a plurality of vias in the sacrificial carrier; and

the bottom layer of the sacrificial carrier bonded to clear dicing tape, wherein the clear dicing tape securely bonds the sacrificial carrier to a cutting surface of the saw for dicing of the semiconductor wafer into the set of chips, wherein the semiconductor wafer is diced into the set of chips by dicing through the semiconductor wafer and the adhesive film and into the sacrificial carrier, and wherein the sacrificial carrier dresses the diamond blade of the saw so as to expose one or more new, sharp layers of diamonds on the diamond blade.

2. The sacrificial carrier dicing structure of claim 1 , wherein the sacrificial carrier is a glass sacrificial carrier that is UltraViolet (UV) transmissible.

3. The sacrificial carrier dicing structure of claim 1 , wherein the sacrificial carrier is a sacrificial silicon substrate carrier that is infrared (IR) transmissible.

4. The sacrificial carrier dicing structure of claim 1 , wherein the adhesive film is an UltraViolet (UV) sensitive film, wherein the set of chips is extracted from the sacrificial carrier after dicing upon exposing the UV sensitive film to a UV light.

5. The sacrificial carrier dicing structure of claim 1 , wherein the adhesive film is an Infrared (IR) sensitive film and wherein the set of chips is extracted from the sacrificial carrier after dicing upon exposure of the IR sensitive film to an IR light.

6. The sacrificial carrier dicing structure of claim 2 , wherein the sacrificial glass carrier is comprised of one of the group comprising quartz substrate, fused quartz substrate, or sapphire glass substrate.

7. The sacrificial carrier dicing structure of claim 2 , wherein the sacrificial glass carrier is a toughened sacrificial glass carrier, wherein the toughened sacrificial glass carrier is toughened through a use of at least one of dopants or tempering to provide a harder glass substrate which remains UV transmissible.

8. The sacrificial carrier dicing structure of claim 1 , wherein the set of chips are extracted from the sacrificial carrier after dicing by releasing the vacuum force upon the set of chips remaining of the semiconductor wafer.

9. An apparatus for sacrificial carrier dicing of semiconductor wafers, the apparatus comprising:

a saw; and

a diamond blade mounted in the saw, wherein the diamond blade dices a bonded structure comprising:

a bottom layer of a semiconductor wafer bonded to a top layer of a sacrificial carrier using adhesive film,

the bottom layer of the semiconductor wafer coupled to the top layer of the sacrificial carrier using a vacuum force, wherein the vacuum force is generated on the bottom layer of the semiconductor wafer through a plurality of vias in the sacrificial carrier, and

the bottom layer of the sacrificial carrier coupled to clear dicing tape, wherein the clear dicing tape securely bonds the sacrificial carrier to a cutting surface of the saw for dicing of the semiconductor wafer into the set of chips,

wherein the semiconductor wafer is diced into a set of chips by dicing through the semiconductor wafer and the adhesive film and into the sacrificial carrier, and wherein the sacrificial carrier dresses the diamond blade of the saw so as to expose one or more new, sharp layers of diamonds on the diamond blade.

10. The apparatus of claim 9 , wherein the sacrificial carrier is a glass sacrificial carrier that is UltraViolet (UV) transmissible.

11. The apparatus of claim 9 , wherein the sacrificial carrier is a sacrificial silicon substrate carrier that is Infrared (IR) transmissible.

12. The apparatus of claim 9 , wherein the adhesive film is an UltraViolet (UV) sensitive film, wherein the set of chips is extracted from the sacrificial carrier after dicing upon exposing the UV sensitive film to a UV light.

13. The apparatus of claim 9 , wherein the adhesive film is an Infrared (IR) sensitive film and wherein the set of chips is extracted from the sacrificial carrier after dicing upon exposure of the IR sensitive film to an IR light.

14. The apparatus of claim 10 , wherein the sacrificial glass carrier is comprised of one of the group comprising quartz substrate, fused quartz substrate, or sapphire glass substrate.

15. The apparatus of claim 10 , wherein the sacrificial glass carrier is a toughened sacrificial glass carrier, wherein the toughened sacrificial glass carrier is toughened through a use of at least one of dopants or tempering to provide a harder glass substrate which remains UV transmissible.

16. The apparatus of claim 9 , wherein the set of chips are extracted from the sacrificial carrier after dicing by releasing the vacuum force upon the set of chips remaining of the semiconductor wafer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052561/0161 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2014
From: GRAF, RICHARD S.; POWELL, DOUGLAS O.; RUSSELL, DAVID J.; WEST, DAVID J.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 033756/0474 →
Continuity (1)
Related Publication 20160079117A1 · Mar 17, 2016