Wake-up receiver with automatic interference rejection
A low power radio is provided with automatic interference rejection. The radio is comprised generally of: an antenna, a rectifier, a comparator, and a correlator. The comparator receives an input signal from the rectifier, compares the input signal to a reference signal and outputs a digital signal. The correlator in turn receives the digital signal from the comparator, correlates the digital signal to a wake-up code and outputs a wake-up signal having a high value when the digital signal is highly correlated with the wake-up code. The radio further includes an automatic threshold controller which adjusts sensitivity of the comparator. Of note, the rectifier, the comparator, the correlator and the automatic threshold controller are comprised in part by circuits having transistors operating only in subthreshold region.
1. A low power radio, comprising:
an antenna configured to receive an RF signal;
a rectifier configured to receive the RF signal from the antenna and generate a rectified input signal;
a comparator configured to receive the input signal from the rectifier, the comparator compares the input signal to a reference signal and outputs a digital signal;
an automatic threshold control circuit configured to receive the digital signal from the comparator and adjust the reference signal to change sensitivity of the receiver, wherein the automatic threshold control circuit is comprised in part by digital circuits having transistors operating only in subthreshold region; and
a correlator comprised in part by digital circuits having transistors operating in subthreshold region, the correlator configured to receive the digital signal from the comparator, correlate the digital signal to a wake-up code and output a wake-up signal, the wake-up signal having a high value when correlation between the digital signal and the wake-up code exceeds a correlation threshold and a low value when correlation between the digital signal and the wake-up code is less than a correlation threshold.
2. The low power radio of claim 1 wherein the rectifier is comprised in part by circuits having transistors operating only in subthreshold region.
3. The low power radio of claim 1 wherein the rectifier is further defined as a Dickson Multiplier circuit.
4. The low power radio of claim 1 wherein comparator is comprised in part by circuits having transistors operating only in subthreshold region.
5. The low power radio of claim 1 wherein the correlator is further defined as a plurality of the correlators operating in parallel, such that each correlator receives different shifted samples from a bit slice and compares the shifted samples to the wake-up code.
6. The low power radio of claim 1 further comprises an oscillator that generates a reference clock signal, where the comparator and the correlator use the reference clock signal from the oscillator.
7. The low power radio of claim 6 wherein the oscillator includes a crystal and an oscillator circuit, where the oscillator circuit includes an amplifier coupled across the crystal and the amplifier is biased by a feedback circuit to sustain oscillation of the crystal with minimum power consumption.
8. The low power radio of claim 7 wherein the rectifier, the comparator, the correlator and the oscillator circuit are implemented as an integrated circuit.
9. The low power radio of claim 1 further comprises a low-power amplifier electrically coupled between the antenna and the rectifier.
10. The low power radio of claim 1 further comprises a radio component configured to receive the wake-up signal from the correlator while operating in a low power consumption mode, the radio component transitions from a low power consumption mode to a high power consumption mode in response to receiving the wake-up signal with a high value.
11. A low power radio, comprising:
a rectifier configured to receive an RF signal and generate a rectified input signal;
a comparator circuit having transistors operating only in subthreshold region, the comparator configured to receive the input signal from the rectifier, compares the input signal to a reference signal and outputs a digital signal;
a correlator circuit having transistors operating only in subthreshold region, the correlator configured to receive the digital signal from the comparator circuit, correlate the digital signal to a wake-up code and output a wake-up signal, the wake-up signal having a high value when correlation between the digital signal and the wake-up code exceeds a correlation threshold and a low value when correlation between the digital signal and the wake-up code is less than a correlation threshold; and
automatic threshold control circuit having transistors operating only in subthreshold region, the automatic threshold control circuit configured to receive the digital signal from the comparator circuit and adjust the reference signal in accordance with values of the digital signal.
12. The low power radio of claim 11 wherein the rectifier is further defined as a Dickson Multiplier circuit.
13. The low power radio of claim 11 wherein the correlator circuit is further defined as a plurality of the correlators operating in parallel, such that each correlator receives different shifted samples from a bit slice and compares the shifted samples to the wake-up code.
14. The low power radio of claim 11 wherein the rectifier, the comparator circuit, the correlator circuit and the automatic threshold control circuit are implemented as an integrated circuit.
15. The low power radio of claim 11 further comprises an oscillator that generates a reference clock signal, where the comparator circuit and the correlator circuit use the reference clock signal from the oscillator.
16. The low power radio of claim 15 wherein the oscillator includes a crystal and an oscillator circuit, where the oscillator circuit includes an amplifier coupled across the crystal and the amplifier is biased by a feedback circuit to sustain oscillation of the crystal with minimum power consumption.
17. A low power baseband processor, comprising:
a correlator circuit configured to receive a digital signal from a demodulator, correlate the digital signal to a wake-up code and output a wake-up signal, the wake-up signal having a high value when correlation between the digital signal and the wake-up code exceeds a correlation threshold and a low value when correlation between the digital signal and the wake-up code is less than a correlation threshold;
an automatic threshold control circuit configured to receive the digital signal from the demodulator and adjust sensitivity of the demodulator in accordance with values of the digital signal; and
an oscillator circuit that generates a clock signal, where the correlator circuit and the automatic threshold control circuit are clocked by the clock signal from the oscillator circuit and the correlator circuit, the automatic threshold control circuit and the oscillator circuit include transistors operating only in subthreshold region.
18. The low power baseband processor of claim 17 wherein the correlator circuit is further defined as a plurality of the correlators operating in parallel, such that each correlator receives different shifted samples from a bit slice of the digital signal and compares the shifted samples to the wake-up code.
19. The low power baseband processor of claim 17 wherein the automatic threshold control circuit decreases sensitivity of the demodulator when the number of consecutive samples from the digital signal having a high value exceeds a first threshold and increases sensitivity of the demodulator when the number of consecutive samples from the digital signal having a low value exceeds a second threshold.
20. The low power baseband processor of claim 17 wherein the demodulator, the correlator circuit and the automatic threshold control circuit are implemented as an integrated circuit.
21. The low power baseband processor of claim 17 further comprises a crystal that drives the oscillator circuit, where the oscillator circuit includes an amplifier coupled across the crystal and the amplifier is biased by a feedback circuit to sustain oscillation of the crystal with minimum power consumption.