Analog-to-digital converter and CMOS image sensor including the same
A CMOS image sensor includes an active pixel array suitable for generating an active pixel signal, a dummy pixel array suitable for generating a dummy pixel signal, a row driver suitable for controlling the active pixel array and the dummy pixel array to simultaneously operate at a same column, and a correlated double sampling (CDS) array suitable for generating an active sampling signal and a dummy sampling signal, which are sampled from the active pixel signal and the dummy pixel signal by using a correlated double sampling, respectively, based on a first ramp signal and a second ramp signal, and comparing the active sampling signal with the dummy sampling signal.
1. An analog-to-digital converter, comprising:
a ramp signal generator suitable for generating a first ramp signal and a second ramp signal; and
a correlated double sampling (CDS) array,
wherein the CDS array includes a CDS circuit at each column, and
wherein the CDS circuit includes:
a dummy sampling signal generation unit suitable for generating a dummy sampling signal, which is sampled from a dummy pixel signal outputted from a dummy pixel array by using a correlated double sampling, based on the first ramp signal;
an active sampling signal generation unit suitable for generating an active sampling signal, which is sampled from an active pixel signal outputted from an active pixel array by using a correlated double sampling, based on the second ramp signal, and
a comparison unit suitable for comparing the dummy sampling signal with the active sampling signal.
2. The analog-to-digital converter of claim 1 , wherein the dummy pixel array includes an optical black (OB) pixel array.
3. The analog-to-digital converter of claim 1 , wherein the dummy sampling signal generation unit and the active sampling signal generation unit have a differential input structure using a same circuit.
4. The analog-to-digital converter of claim 1 , wherein the dummy sampling signal generation unit includes:
a first switch suitable for controlling a transmission of the dummy pixel signal;
a first blocking capacitor coupled between an input node of the first ramp signal and an output node of the first switch; and
a first signal storage capacitor coupled to the output node of the first switch, and suitable for providing the dummy pixel signal.
5. The analog-to-digital converter of claim 4 , wherein the active sampling signal generation unit includes:
a second switch suitable for controlling a transmission of the active pixel signal;
a second blocking capacitor coupled between an input node of the second ramp signal and an output node of the second switch; and
a second signal storage capacitor coupled to the output node of the second switch, and suitable for providing the active sampling signal.
6. The analog-to-digital converter of claim 5 , wherein the first switch and the second switch have a same element, the first blocking capacitor and the second capacitor have a same element, and the first signal storage capacitor and the second signal storage capacitor have a same element.
7. The analog-to-digital converter of claim 1 , wherein the active pixel signal and the dummy pixel signal have a same noise characteristic, and the first ramp signal and the second ramp signal have a same noise characteristic.
8. The analog-to-digital converter of claim 1 , wherein an input of the comparison unit is expressed as,
Vin p −Vin m =(RAMP−RAMP_REF)−(APS_ O−OB _ O ),
where Vinp−Vinm denotes the input of the comparison unit, RAMP denotes the first ramp signal, RAMP_REF denotes the second ramp signal, APS_O denotes the active pixel signal and OB_O denotes the dummy pixel signal.
9. The analog-to-digital converter of claim 1 , wherein the dummy pixel array has a same horizontal characteristic as the active pixel array.
10. The analog-to-digital converter of claim 1 , wherein dummy pixels included in the dummy pixel array are matched one to one with active pixels included in the active pixel array at each column.
11. An analog-to-digital converter, comprising:
a correlated double sampling (CDS) array,
wherein the CDS array includes a CDS circuit at each column, and
wherein the CDS circuit includes:
a dummy sampling signal generation unit suitable for generating a dummy sampling signal, which is sampled from a dummy pixel signal outputted from a dummy pixel array by using a correlated double sampling;
an active sampling signal generation unit suitable for generating an active sampling signal, which is sampled from an active pixel signal outputted from an active pixel array by using a correlated double sampling; and
a comparison unit suitable for comparing the dummy sampling signal with the active sampling signal.
12. The analog-to-digital converter of claim 11 , wherein the dummy pixel array includes an optical black (OB) pixel array.
13. A CMOS image sensor, comprising:
an active pixel array suitable for generating an active pixel signal;
a dummy pixel array suitable for generating a dummy pixel signal;
a row driver suitable for controlling the active pixel array and the dummy pixel array to simultaneously operate at a same column; and
a correlated double sampling (CDS) array suitable for generating an active sampling signal and a dummy sampling signal, which are sampled from the active pixel signal and the dummy pixel signal by using a correlated double sampling, respectively, based on a first ramp signal and a second ramp signal, and comparing the active sampling signal with the dummy sampling signal.
14. The CMOS image sensor of claim 13 , wherein the dummy pixel array includes an optical black (OB) pixel array.
15. The CMOS image sensor of claim 13 , wherein the CDS array includes a CDS circuit at each column, and
wherein the CDS circuit includes:
a dummy sampling signal generation unit suitable for generating the dummy sampling signal sampled from the dummy pixel signal based on the first ramp signal;
an active sampling signal generation unit suitable for generating the active sampling signal from the active pixel signal based on the second ramp signal; and
a comparison unit suitable for comparing the dummy sampling signal with the active sampling signal.
16. The CMOS image sensor of claim 15 , wherein the dummy sampling signal generation unit and the active sampling signal generation unit include a differential input structure using a same circuit.
17. The CMOS image sensor of claim 15 , wherein an input of the comparison unit is expressed as,
Vin p −Vin m =(RAMP−RAMP_REF)−(APS_ O−OB _ O ),
where Vinp−Vinm denotes the input of the comparison unit, RAMP denotes the first ramp signal, RAMP_REF denotes the second ramp signal, APS_O denotes the active pixel signal and OB_O denotes the dummy pixel signal.
18. The CMOS image sensor of claim 13 , wherein the active pixel signal and the dummy pixel signal have a same noise characteristic, and the first ramp signal and the second ramp signal have a same noise characteristic.
19. The CMOS image sensor of claim 13 , wherein the dummy pixel array is disposed along a row direction to form at least a row and to have a same horizontal characteristic as the active pixel array.
20. The CMOS image sensor of claim 13 , wherein dummy pixels included in the dummy pixel array are matched one to one with active pixels included in the active pixel array at each column.
21. A CMOS image sensor, comprising:
an active pixel array suitable for generating an active pixel signal;
a dummy pixel array suitable for generating a dummy pixel signal;
a row driver suitable for controlling the active pixel array and the dummy pixel array to simultaneously operate at a same column; and
a correlated double sampling (CDS) array suitable for generating an active sampling signal and a dummy sampling signal, which are sampled from the active pixel signal and the dummy pixel signal by using a correlated double sampling, respectively, and comparing the active sampling signal with the dummy sampling signal.
22. The CMOS image sensor of claim 21 , wherein the dummy pixel array includes an optical black (OB) pixel array.
23. The CMOS image sensor of claim 21 , wherein the dummy pixel array is disposed along a row direction to have a same horizontal characteristic as the active pixel array.
24. A CMOS image sensor, comprising:
an active pixel array suitable for generating an active pixel signal;
a dummy pixel array suitable for generating a dummy pixel signal, wherein the dummy pixel array includes dummy pixels corresponding one to one to active pixels included in the active pixel array at each column;
a row driver suitable for controlling the active pixel array and the dummy pixel array to simultaneously operate at a same column; and
a correlated double sampling (CDS) array suitable for generating an active sampling signal and a dummy sampling signal, which are sampled from the active pixel signal and the dummy pixel signal by using a correlated double sampling.
25. The CMOS image sensor of claim 24 , wherein the dummy pixel array includes an optical black (OB) pixel array.