IP Library Granted Patent US 9,477,999
Granted Patent B2
US 9,477,999 · App. 14/492,535 · Granted Oct 25, 2016

Low power programmable image processor

Inventors: Rehan Hameed (Palo Alto, CA); Wajahat Qadeer (Menlo Park, CA); Christoforos Kozyrakis (Stanford, CA); Mark A. Horowitz (Stanford, CA)
Assignee: The Board of Trustees of the Leland Stanford Junior University
G06T1/20
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Quick Facts
Patent No.
US 9,477,999
App. No.
14/492,535
Granted
Oct 25, 2016
Kind
B2
Abstract

A convolution image processor includes a load and store unit, a shift register unit, and a mapping unit. The load and store unit is configured to load and store image pixel data and allow for unaligned access of the image pixel data. The shift register is configured to load and store at least a portion of the image pixel data from the load and store unit and concurrently provide access to each image pixel value in the portion of the image pixel data. The mapping unit is configured to generate a number of shifted versions of image pixel data and corresponding stencil data from the portion of the image pixel data, and concurrently perform one or more operations on each image pixel value in the shifted versions of the portion of the image pixel data and a corresponding stencil value in the corresponding stencil data.

Claims (44)

1. A convolution image processor comprising:

a load and store unit configured to load and store image pixel data and stencil data such that the load and store unit provides unaligned access to the image pixel data;

a shift register unit configured to load and store at least a portion of the image pixel data from the load and store unit and concurrently provide access to each image pixel value in the portion of the image pixel data; and

a mapping unit comprising:

a plurality of interface units each configured to:

generate a plurality of shifted versions of image pixel data from the portion of the image pixel data such that a pattern of the shifted versions of image pixel data is different between each of the plurality of interface units; and

provide corresponding stencil data to the shifted versions of image pixel data; and

a plurality of arithmetic logic units (ALUs) configured to concurrently perform one or more operations on each image pixel value in the plurality of shifted versions of the portion of the image pixel data and a corresponding stencil value in the corresponding stencil data provided from a subset of the plurality of interface units, wherein the subset of the plurality of interface units and the one or more operations performed on each image pixel value are programmable.

2. The convolution image processor of claim 1 wherein the shift register unit includes a number of two dimensional shift registers.

3. The convolution image processor of claim 1 further comprising a reducing unit configured to combine at least two of the resulting values from the one or more operations on each image pixel value and the corresponding stencil value in the corresponding stencil data.

4. The convolution image processor of claim 3 wherein performing the one or more operations on each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data comprises multiplying each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data.

5. The convolution image processor of claim 4 wherein combining at least two of the resulting values from the one or more operations on each image pixel value and the corresponding stencil value in the corresponding stencil data comprises adding the resulting values.

6. The convolution image processor of claim 3 wherein performing the one or more operations on each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data comprises calculating the absolute difference between each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data.

7. The convolution image processor of claim 6 wherein combining at least two of the resulting values from the one or more operations on each image pixel value and the corresponding stencil value in the corresponding stencil data comprises adding the resulting values.

8. The convolution image processor of claim 3 wherein performing the one or more operations on each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data comprises comparing each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data.

9. The convolution image processor of claim 8 wherein combining at least two of the resulting values from the one or more operations on each image pixel value and the corresponding stencil value in the corresponding stencil data comprises performing a logical AND on the resulting values.

10. The convolution image processor of claim 3 wherein performing the one or more operations on each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data comprises subtracting the corresponding stencil value in the corresponding stencil data from each image pixel value in the plurality of shifted versions of the portion of the image pixel data.

11. The convolution image processor of claim 1 wherein the plurality of shifted versions of the portion of the image pixel data are one or more of a horizontally shifted version and a vertically shifted version.

12. The convolution image processor of claim 1 wherein performing the one or more operations on each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data comprises one of:

multiplying each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data;

comparing each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data;

averaging each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data; and

subtracting the corresponding stencil value in the corresponding stencil data from each image pixel value in the plurality of shifted versions of the portion of the image pixel data.

13. The convolution image processor of claim 1 wherein the stencil data is image pixel data from a reference image.

14. A method of operating a convolution image processor comprising:

loading and storing image pixel data and stencil data and providing unaligned access of the image pixel data via a load and store unit;

loading and storing at least a portion of the image pixel data and concurrently providing access to each image pixel value in the portion of image pixel data via a shift register unit;

generating a plurality of shifted versions of image pixel data and corresponding stencil data from the portion of the image pixel data via a plurality of interface units such that a pattern of the shifted versions of image pixel data is different between each of the plurality of interface units; and

concurrently performing one or more operations on each image pixel value in the plurality of shifted versions of the portion of the image pixel data and a corresponding stencil value in the corresponding stencil data provided from a subset of the plurality of interface units via a mapping unit, wherein the subset of the plurality of interface units and the one or more operations performed on each image pixel value are programmable.

15. The method of claim 14 further comprising combining at least two of the resulting values from the one or more operations on each image pixel value and the corresponding stencil value in the corresponding stencil data via a reducing unit.

16. The method of claim 15 wherein performing the one or more operations on each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data comprises multiplying each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data.

17. The method of claim 16 wherein combining at least two of the resulting values from the one or more operations on each image pixel value and the corresponding stencil value in the corresponding stencil data comprises adding the resulting values.

18. The method of claim 15 wherein performing the one or more operations on each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data comprises calculating the absolute difference between each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data.

19. The method of claim 18 wherein combining at least two of the resulting values from the one or more operations on each image pixel value and the corresponding stencil value in the corresponding stencil data comprises adding the resulting values.

20. The method of claim 15 wherein performing the one or more operations on each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data comprises comparing each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data.

21. The method of claim 20 wherein combining at least two of the resulting values from the one or more operations on each image pixel value and the corresponding stencil value in the corresponding stencil data comprises performing a logical AND on the resulting values.

22. The method of claim 15 wherein performing the one or more operations on each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data comprises subtracting the corresponding stencil value in the corresponding stencil data from each image pixel value in the plurality of shifted versions of the portion of the image pixel data.

23. The method of claim 14 wherein the plurality of shifted versions of the portion of the image pixel data are one or more of a horizontally shifted version and a vertically shifted version.

24. The method of claim 14 wherein performing the one or more operations on each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data comprises one of:

multiplying each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data;

comparing each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data;

averaging each image pixel value in the plurality of shifted versions of the portion of the image pixel data and the corresponding stencil value in the corresponding stencil data; and

subtracting the corresponding stencil value in the corresponding stencil data from each image pixel value in the plurality of shifted versions of the portion of the image pixel data.

25. The method of claim 14 wherein the stencil data is image pixel data from a reference image.

Assignments (3)
CONFIRMATORY LICENSE Recorded May 4, 2017
From: STANFORD UNIVERSITY
To: DARPA
Reel/Frame 042402/0433 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2016
From: HAMEED, REHAN
To: THE BOARD OF TRUSTEES OF THE LELAND STANFORD JUNIOR UNIVERSITY
Reel/Frame 038171/0558 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2016
From: QADEER, WAJAHAT; KOZYRAKIS, CHRISTOFOROS E.; HOROWITZ, MARK A.
To: THE BOARD OF TRUSTEES OF THE LELAND STANFORD JUNIOR UNIVERSITY
Reel/Frame 037868/0030 →
Continuity (2)
Provisional Application 61880637 · Sep 20, 2013
Related Publication 20150086134A1 · Mar 26, 2015