Method of processing data with an array of data processors according to application ID

1. A method, comprising:

providing a plurality of data processors,

providing a plurality of applications each identified by an APID,

associating respective one or more of said plurality of data processors with said one or more of said plurality of applications;

providing a memory, wherein said memory is composed of a plurality of separately addressable pages and further wherein said APID is used to address individual pages; and

communicating data to and from said memory and said plurality of data processors according to said APID.

2. The method according to claim 1 wherein the higher order bits of an address addresses different memories.

3. The method according to claim 1 wherein said plurality of applications are processed in parallel.

4. The method according to claim 1 where the memory is located on the same physical chip as the plurality of data processors.

5. The method according to claim 4 , wherein the memory comprises a plurality of separately addressable memories.

6. The method according to claim 1 where an APID comprises an address.

7. The method according to claim 1 where an APID comprises higher order bits of an address.

8. The method of claim 1 wherein the method of communicating data from the one or more processors associated with an application to a memory comprises communicating data, a data address and the APID.

9. The method of claim 8 where the APID comprises an address.

10. A method, comprising:

providing a plurality of data processors,

providing a plurality of applications each identified by an APID,

associating respective one or more of said plurality of data processors with said one or more of said plurality of applications;

providing a memory, wherein said memory comprises a plurality of different memories and said APID is used to address individual memories; and

communicating data to and from said memory and said plurality of data processors according to said APID.