IP Library Granted Patent US 9,184,283
Granted Patent B2
US 9,184,283 · App. 14/503,424 · Granted Nov 10, 2015

High voltage device

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Quick Facts
Patent No.
US 9,184,283
App. No.
14/503,424
Granted
Nov 10, 2015
Kind
B2
Abstract

A method of forming a device is presented. The method includes providing a substrate having a device region which includes a source region, a gate and a drain region defined thereon. The method also includes implanting the gate. The gate comprises one or more doped portions with different dopant concentrations. A source and a drain are formed in the source region and drain region. The drain is separated from the gate on a second side of the gate and the source is adjacent to a first side of the gate.

Claims (42)

1. A device comprising:

a substrate having a device region, wherein the device region comprises a source region, a gate and a drain region defined thereon;

a drift well disposed in the substrate between the gate and drain region, wherein the drift well encompasses the drain region and underlaps a portion of the gate and creates a gate overlap region O gate in the drift well, wherein the gate comprises one or more doped portions with different dopant concentrations, and the gate comprises a first doped portion and a second doped portion, the interface of the first and second doped portions is at about an inner edge of the drift well; and

a source and a drain in the source region and drain region, wherein the drain is separated from the gate on a second side of the gate and the source is adjacent to a first side of the gate.

2. The device of claim 1 comprises an internal device isolation region along a channel width direction in the substrate between the gate and drain.

3. The device of claim 2 wherein:

the drift well encompasses the internal device isolation region; and

the drift well underlaps the portion of the gate and creates the gate overlap region O gate between the inner edge of the drift well under the gate and an edge of the internal device isolation region under the gate.

4. The device of claim 2 comprises a device well in the substrate, wherein the device well is at about the same depth as the drift well.

5. The device of claim 2 comprises an isolation region, wherein the isolation region isolates the device region from other regions of the device.

6. The device of claim 5 comprises a device well in the substrate, wherein a depth of the device well is below the isolation region.

7. The method of claim 6 wherein the device well encompasses the source, drain, drift well and internal device isolation region.

8. The device of claim 2 wherein:

the first portion is at least over about a channel of the device between the source and the O gate region;

the first portion comprises a first dopant concentration C 1 ; and

the second portion comprises a second dopant concentration C 2 , wherein C 2 is lower than C 1 .

9. The device of claim 1 wherein:

the first portion is at least over about a channel of the device between the source and the O gate region;

the first portion comprises a first dopant concentration C 1 ; and

the second portion comprises a second dopant concentration C 2 , wherein C 2 is lower than C 1 .

10. The device of claim 1 comprises a salicide block on the substrate over the drift well.

11. A device comprising:

a substrate having a device region, wherein the device region comprises a source region, a gate and a drain region defined thereon; and

a drift well which comprises first polarity type dopants disposed in the substrate between the gate and drain region, wherein the drift well encompasses the drain region and underlaps a portion of the gate and creates a gate overlap region O gate in the drift well, wherein the gate comprises one or more doped portions with different dopant concentrations, and the gate comprises a first doped portion and a second doped portion, the interface of the first and second doped portions is at about an inner edge of the drift well; and

a source and a drain in the source region and drain region, wherein the drain is separated from the gate on a second side of the gate and the source is adjacent to a first side of the gate.

12. The device of claim 11 wherein:

the first portion is at least over about a channel of the device between the source and the O gate region;

the first portion comprises a first dopant concentration C 1 ; and

the second portion comprises a second dopant concentration C 2 , wherein C 2 is lower than C 1 .

13. A device comprising:

a substrate having a device region, wherein the device region comprises a source, a gate and a drain defined thereon; and

a drift well disposed in the substrate between the gate and drain, wherein

the drift well encompasses the drain and underlaps a portion of the gate and creates a gate overlap region O gate in the drift well,

the gate comprises at least first and second portions with different dopant concentrations and an interface of the first and second portions of the gate is at about an inner edge of the drift well, and

the drain is separated from the gate on a second side of the gate and the source is adjacent to a first side of the gate.

14. The device of claim of claim 13 wherein the first portion is a heavily doped portion and the second portion is a lightly doped portion relative to the first portion.

15. The device of claim 14 wherein the first and second portions of the gate comprise first polarity type dopants.

16. The device of claim 14 comprises an internal device isolation region along a channel width direction in the substrate between the gate and drain.

17. The device of claim 14 comprises a salicide block on the substrate over the drift well.

18. The device of claim 13 wherein the first portion is a heavily doped region which comprises first polarity type dopants and the second portion is undoped.

19. The device of claim 18 comprises an internal device isolation region along a channel width direction in the substrate between the gate and drain.

20. The device of claim 18 comprises a salicide block on the substrate over the drift well.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Nov 19, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 054481/0673 →
SECURITY AGREEMENT Recorded Nov 27, 2018
From: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 047660/0203 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 1, 2014
From: ZHANG, GUOWEI
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 033858/0196 →