IP Library › Granted Patent US 9,379,076
Granted Patent B2
US 9,379,076 · App. 14/503,795 · Granted Jun 28, 2016

Semiconductor device and manufacturing method thereof

Inventors: Chen-Chih Hsieh (Miaoli County, TW); Hao-Yi Tsai (Hsinchu, TW); Chao-Wen Shih (Hsinchu County, TW); Yung-Ping Chiang (Hsinchu County, TW); Tsung-Yuan Yu (Taipei, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
H01L24/13H01L21/56H01L21/565H01L21/76877H01L23/3171H01L23/528H01L23/5226H01L24/11H01L2224/1132H01L2224/11848H01L2224/13147H01L2224/13155
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Quick Facts
Patent No.
US 9,379,076
App. No.
14/503,795
Granted
Jun 28, 2016
Kind
B2
Abstract

A method of manufacturing a semiconductor structure includes receiving a substrate including a die pad disposed thereon; disposing a passivation over the substrate and around the die pad; disposing a polymer over the passivation; forming a post passivation interconnect (PPI) including an elongated portion and a via portion contacting with the die pad; depositing a metallic paste on the elongated portion of the PPI by a stencil; disposing a conductive bump over the metallic paste; and disposing a molding over the PPI and around the metallic paste and the conductive bump.

Claims (40)

1. A method of manufacturing a semiconductor structure, comprising:

receiving a substrate including a die pad disposed thereon;

disposing a passivation over the substrate and around the die pad;

disposing a polymer over the passivation;

forming a post passivation interconnect (PPI) including an elongated portion and a via portion contacting with the die pad;

depositing a metallic paste on the elongated portion of the PPI by a stencil including an aperture corresponding to a predetermined position of the elongated portion of the PPI;

disposing a conductive bump over the metallic paste; and

disposing a molding over the PPI and around the metallic paste and the conductive bump.

2. The method of claim 1 , wherein the depositing the metallic paste includes screen printing the metallic paste over the stencil.

3. The method of claim 1 , wherein the depositing the metallic paste includes sweeping across the semiconductor structure over the stencil by a blade to remove the overflown metallic paste.

4. The method of claim 1 , wherein the aperture is configured to receive the metallic paste or the conductive bump.

5. The method of claim 1 , wherein the conductive bump is disposed by the stencil.

6. The method of claim 1 , further comprising curing the metallic paste to form a concavity for receiving the conductive bump.

7. The method of claim 1 , wherein the metallic paste includes a metal and an adhesive.

8. The method of claim 1 , further comprising curing the semiconductor structure before or after disposing the conductive bump.

9. The method of claim 1 , wherein the disposing the passivation includes forming a first opening above the die pad, and the via portion is disposed within the first opening.

10. The method of claim 1 , wherein the disposing the polymer includes forming a second opening above the die pad, and the via portion is disposed within the second opening.

11. A method of manufacturing a semiconductor structure, comprising:

receiving a substrate including a passivation disposed over the substrate and a die pad exposed from the passivation;

disposing a polymer over the passivation;

forming a post passivation interconnect (PPI) electrically connected to the die pad;

placing a stencil on the PPI;

filling an aperture of the stencil by a metallic paste;

disposing a conductive bump on the metallic paste;

removing the stencil; and

disposing a molding over the PPI and around the metallic paste and the conductive bump.

12. The method of claim 11 , wherein the aperture of the stencil is configured for receiving the metallic paste or the conductive bump.

13. The method of claim 11 , wherein the stencil is placed on the PPI during the filling of the metallic paste and the disposing of the conductive bump.

14. The method of claim 11 , wherein the aperture of the stencil is completely filled with the metallic paste by removing the metallic paste overflown from the opening.

15. A method of manufacturing a semiconductor structure, comprising:

receiving a substrate including a die pad disposed thereon and a post passivation interconnect (PPI) disposed over the substrate, wherein the PPI includes an elongated portion and a via portion contacting with the die pad;

placing a stencil over the PPI;

depositing a metallic paste at a predetermined position of the elongated portion of the PPI by the stencil;

disposing a conductive bump over the metallic paste; and

disposing a molding around the conductive bump and the metallic paste.

16. The method of claim 15 , wherein the disposing the conductive bump includes forming a concavity interfacing the metallic paste and the conductive bump, and the concavity is conformal to a portion of an outer surface of the conductive bump.

17. The method of claim 15 , wherein the metallic paste is encapsulated by the conductive bump.

18. The method of claim 15 , wherein the depositing the metallic paste includes forming the metallic paste with a width substantially same as or greater than a diameter of the conductive bump.

19. The method of claim 15 , wherein the metallic paste is encapsulated by the molding, and the conductive bump is partially exposed from the molding.

20. The method of claim 15 , wherein the conductive bump is held by the metallic paste.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 1, 2014
From: HSIEH, CHEN-CHIH; TSAI, HAO-YI; SHIH, CHAO-WEN; CHIANG, YUNG-PING; YU, TSUNG-YUAN
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
Reel/Frame 033862/0967 →
Continuity (1)
Related Publication 20160099223A1 · Apr 7, 2016