Back side illuminated image sensor with guard ring region reflecting structure
A photon detector includes a single photon avalanche diode (SPAD) disposed proximate to a front side of a semiconductor layer. The SPAD includes a multiplication junction that is reversed biased above a breakdown voltage such that light directed into the SPAD through a backside of the semiconductor layer triggers an avalanche multiplication process. A guard ring is disposed in a guard ring region that surrounds the SPAD to isolate the SPAD in the semiconductor layer. A guard ring region reflecting structure is disposed in the guard ring region proximate to the guard ring and proximate to the front side of the semiconductor layer such that light directed into the guard ring region through the backside of the semiconductor layer that bypasses the SPAD is redirected by the guard ring region reflecting structure back into the semiconductor layer and into the SPAD.
1. A photon detector, comprising:
a single photon avalanche diode (SPAD) disposed proximate to a front side of a first semiconductor layer, wherein the SPAD includes a multiplication junction defined at an interface between an n doped layer and a p doped layer of the SPAD in the first semiconductor layer, wherein the multiplication junction is reversed biased above a breakdown voltage such that light directed into the SPAD through a backside of the first semiconductor layer triggers an avalanche multiplication process in the multiplication junction;
a guard ring disposed in the first semiconductor layer in a guard ring region proximate to the SPAD, wherein the guard ring surrounds the SPAD to isolate the SPAD in the first semiconductor layer;
a guard ring region reflecting structure disposed in the guard ring region proximate to the guard ring and proximate to the front side of the first semiconductor layer such that light directed into the guard ring region through the backside of the first semiconductor layer that bypasses the SPAD is redirected by the guard ring region reflecting structure back into the first semiconductor layer and into the SPAD; and
a SPAD region reflecting structure disposed proximate to the SPAD and proximate to the front side of the first semiconductor layer such that light directed into the first semiconductor layer through the backside of the first semiconductor layer that passes through the SPAD is reflected by the SPAD region reflecting structure back into the first semiconductor layer and into the SPAD, wherein the guard ring region reflecting structure is non-coplanar with the SPAD region reflecting structure.
2. The photon detector of claim 1 wherein the guard ring region reflecting structure comprises a plurality of metal layers disposed in an oxide material disposed proximate to the front side of the first semiconductor layer.
3. The photon detector of claim 2 wherein the SPAD region reflecting structure is included in one of the plurality of metal layers disposed in the oxide material disposed proximate to the front side of the first semiconductor layer.
4. The photon detector of claim 3 wherein the plurality of metal layers of the guard ring region reflecting structure are arranged in a flat-topped pyramid shape in the oxide material disposed proximate to the front side of the first semiconductor layer.
5. The photon detector of claim 4 wherein the guard ring region reflecting structure is included in a first, a second, and a third one of the plurality of metal layers, and wherein the SPAD region reflecting structure is included in a fourth one of the plurality of metal layers.
6. The photon detector of claim 1 wherein the first semiconductor layer includes thinned silicon.
7. The photon detector of claim 1 wherein the light includes near infrared light.
8. The photon detector of claim 1 wherein the first semiconductor layer is included in a first semiconductor device wafer, wherein the first semiconductor device wafer is stacked with a second semiconductor device wafer including readout circuitry, and wherein the first and second semiconductor device wafer are coupled together in a stacked chip system.
9. The photon detector of claim 5 , wherein the first, the second, and the third one of the plurality of metal layers each form a closed loop, and wherein the fourth one of the plurality of metal layers is a flat top of the flat-topped pyramid shape.
10. The photon detector of claim 2 , wherein individual metal layers in the plurality of metal layers are laterally staggered.
11. The photon detector of claim 10 , wherein a majority of each individual metal layer is optically misaligned with other individual metal layers in the plurality of metal layers.
12. The photon detector of claim 2 , wherein individual metal layers in the plurality of metal layers are surrounded by the oxide material and are electrically isolated from one another.
13. The photon detector of claim 1 , wherein the guard ring region reflecting structure is non-coplanar with the SPAD region reflecting structure in both a vertical direction and a lateral direction, wherein the vertical direction is surface normal to the front side of the first semiconductor layer and the lateral direction is orthogonal to the vertical direction.
14. The photon detector of claim 1 , wherein the guard ring region reflecting structure is rectangular with a center of each rectangle removed, and wherein the SPAD region reflecting structure is rectangular.
15. The photon detector of claim 8 , wherein the guard ring region reflecting structure and the SPAD region reflecting structure are electrically isolated from the readout circuitry.