Semiconductor packages and modules with integrated ferrite material

1. A semiconductor package, comprising:

a lead frame comprising a die paddle and a plurality of leads including a gate lead spaced apart from the die paddle;

a semiconductor die attached to the die paddle and having a plurality of pads including a gate pad;

a plurality of electrical conductors connecting the pads to the leads;

an encapsulant encasing the semiconductor die and a portion of the leads such that part of the leads are not covered by the encapsulant; and

a ferrite material embedded in the encapsulant and surrounding a portion of the electrical conductor that connects the gate pad to the gate lead,

wherein the ferrite material is formed as a continuous uninterrupted structure located near the electrical conductor,

wherein the ferrite material is in the form of a ring disposed on the gate pad, and

wherein the electrical conductor that connects the gate pad to the gate lead is attached to a part of the gate pad surrounded by the ring of ferrite material.

2. The semiconductor package of claim 1 , wherein the ferrite material has a resistive response over a frequency operating range of the semiconductor die.

3. The semiconductor package of claim 1 , further comprising:

an electrically insulating substrate attached to the same side of the die paddle as the semiconductor die,

wherein the electrical conductor that connects the gate pad to the gate lead comprises a first electrically conductive branch that connects the gate pad to a first metal strip on the electrically insulating substrate, a second electrically conductive branch that connects the first metal strip to a second metal strip on the electrically insulating substrate, and a third electrically conductive branch that connects the second metal strip to the gate lead,

wherein the second electrically conductive branch is part of a ferrite bead that also includes the ferrite material which encases the second electrically conductive branch,

wherein each branch of the electrical conductor that connects the gate pad to the gate lead is embedded in the encapsulant.

4. A semiconductor package, comprising:

a lead frame comprising a die paddle and a plurality of leads including a gate lead spaced apart from the die paddle;

a semiconductor die attached to the die paddle and having a plurality of pads including a gate pad;

a plurality of electrical conductors connecting the pads to the leads;

an encapsulant encasing the semiconductor die and a portion of the leads such that part of the leads are not covered by the encapsulant; and

a ferrite material embedded in the encapsulant and surrounding a portion of the electrical conductor that connects the gate pad to the gate lead,

wherein the ferrite material is formed as a continuous uninterrupted structure located near the electrical conductor,

wherein the ferrite material is in the form of a ring disposed on a bonding region of the gate lead encased by the encapsulant, and

wherein the electrical conductor that connects the gate pad to the gate lead is attached to a part of the bonding region of the gate lead surrounded by the ring of ferrite material.

5. A semiconductor package, comprising:

a lead frame comprising a die paddle and a plurality of leads including a gate lead spaced apart from the die paddle;

a semiconductor die attached to the die paddle and having a plurality of pads including a gate pad;

a plurality of electrical conductors connecting the pads to the leads;

an encapsulant encasing the semiconductor die and a portion of the leads such that part of the leads are not covered by the encapsulant; and

a ferrite material embedded in the encapsulant and surrounding a portion of the electrical conductor that connects the gate pad to the gate lead,

wherein the ferrite material is formed as a continuous uninterrupted structure located near the electrical conductor,

wherein the ferrite material is in the form of a ring disposed on a bonding region of the die paddle, wherein the electrical conductor that connects the gate pad to the gate lead comprises a first electrically conductive branch that connects the gate pad to the bonding region of the die paddle and a second electrically conductive branch that connects the bonding region of the die paddle to the gate lead, and

wherein the ring of ferrite material surrounds the first and the second electrically conductive branches at least where the first and the second electrically conductive branches are attached to the bonding region of the die paddle.

6. A semiconductor package, comprising:

a lead frame comprising a die paddle and a plurality of leads including a gate lead spaced apart from the die paddle;

a semiconductor die attached to the die paddle and having a plurality of pads including a gate pad;

a plurality of electrical conductors connecting the pads to the leads;

an encapsulant encasing the semiconductor die and a portion of the leads such that part of the leads are not covered by the encapsulant; and

a ferrite material embedded in the encapsulant and surrounding a portion of the electrical conductor that connects the gate pad to the gate lead,

wherein the ferrite material is formed as a continuous uninterrupted structure located near the electrical conductor,

wherein the electrical conductor that connects the gate pad to the gate lead is part of a ferrite bead that also includes the ferrite material which encases the electrical conductor, the ferrite bead further including a first terminal that connects a first end of the electrical conductor to the gate pad and a second terminal that connects a second end of the electrical conductor to the gate lead.