IP Library Granted Patent US 9,923,105
Granted Patent B2
US 9,923,105 · App. 14/509,975 · Granted Mar 20, 2018

Processing of a direct-bandgap chip after bonding to a silicon photonic device

Inventors: Stephen B. Krasulick (Albuquerque, NM); John Dallesasse (Geneva, IL); Amit Mizrahi (Albuquerque, NM); Timothy Creazzo (Albuquerque, NM); Elton Marchena (Albuquerque, NM); John Y. Spann (Albuquerque, NM)
Assignee: Skorpios Technologies, Inc.
H01L31/02327H01S5/026H01S5/02248H01S5/02268H01S5/02272H01S5/3013H01S5/021H01S5/02252
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Quick Facts
Patent No.
US 9,923,105
App. No.
14/509,975
Granted
Mar 20, 2018
Kind
B2
Abstract

A method for fabricating a photonic composite device for splitting functionality across materials comprises providing a composite device having a platform and a chip bonded in the platform. The chip is processed comprising patterning, etching, deposition, and/or other processing steps while the chip is bonded to the platform. The chip is used as a gain medium and the platform is at least partially made of silicon.

Claims (25)

1. A method for fabricating a composite device for splitting functionality across two or more materials, the method comprising:

providing a composite device, the composite device comprising:

a platform, wherein:

the platform comprises a wall forming a part of a recess; and

the platform comprises a first material;

a chip, wherein:

the chip is bonded in the recess of the platform; and

the chip comprises a second material; and

a material between the wall and the chip forming an optical bridge;

masking the composite device to define an area on the chip to etch;

etching the chip to form a waveguide on the chip, after the chip is bonded to the platform; and

etching the material between the wall and the chip concurrently with etching the chip to form a waveguide on the optical bridge, which is aligned with the waveguide on the chip to guide light from the chip to the platform.

2. The method for fabricating the composite device as recited in claim 1 , wherein the first material is silicon.

3. The method for fabricating the composite device as recited in claim 1 , wherein the second material is a III-V material.

4. The method for fabricating the composite device as recited in claim 1 , wherein the waveguide on the chip is aligned with a waveguide in the platform by using photolithography processes to form the waveguide on the chip after the chip is bonded to the platform.

5. The method for fabricating the composite device as recited in claim 1 , the method further comprising covering the chip to hermetically seal the chip in the recess.

6. The method for fabricating the composite device as recited in claim 1 , wherein etching the chip is performed in a processing chamber used to make CMOS devices.

7. The method for fabricating the composite device as recited in claim 1 , wherein:

a gap between the chip and the platform is at least partially filled with a third material; and

the third material is etched concurrently with etching the chip.

8. The method for fabricating the composite device as recited in claim 1 , wherein:

the composite device comprises a plurality of chips;

each of the plurality of chips is bonded in a corresponding recess of the platform;

each of the plurality of chips is etched concurrently with etching the chip; and

a number of the plurality of chips exceeds 500.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Nov 22, 2017
From: PACIFIC WESTERN BANK
To: SKORPIOS TECHNOLOGIES, INC.
Reel/Frame 044751/0469 →
SECURITY INTEREST Recorded Oct 23, 2017
From: SKORPIOS TECHNOLOGIES, INC.
To: PACIFIC WESTERN BANK
Reel/Frame 043926/0762 →
NUNC PRO TUNC ASSIGNMENT Recorded Mar 4, 2016
From: KRASULICK, STEPHEN B.; DALLESASSE, JOHN; MIZRAHI, AMIT; CREAZZO, TIMOTHY; MARCHENA, ELTON; SPANN, JOHN Y.
To: SKORPIOS TECHNOLOGIES, INC.
Reel/Frame 038001/0900 →
Continuity (3)
Provisional Application 62028611 · Jul 24, 2014
Provisional Application 61888863 · Oct 9, 2013
Related Publication 20150099318A1 · Apr 9, 2015