IP Library Granted Patent US 9,490,334
Granted Patent B2
US 9,490,334 · App. 14/510,126 · Granted Nov 8, 2016

Semiconductor device having metal gate and manufacturing method thereof

Inventors: Chia-Lin Lu (Taoyuan County, TW); Chun-Lung Chen (Tainan, TW); Kun-Yuan Liao (Hsin-Chu, TW); Feng-Yi Chang (Tainan, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L29/42376H01L27/0883H01L29/401H01L29/512
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Quick Facts
Patent No.
US 9,490,334
App. No.
14/510,126
Granted
Nov 8, 2016
Kind
B2
Abstract

A semiconductor device having metal gate includes a substrate, a first metal gate positioned on the substrate, and a second metal gate positioned on the substrate. The first metal gate includes a first work function metal layer, and the first work function metal layer includes a taper top. The second metal gate includes a second work function metal layer. The first work function metal layer and the second work function metal layer are complementary to each other.

Claims (7)

1. A semiconductor device having metal gates comprising:

a substrate;

a first metal gate positioned on the substrate, the first metal gate comprising a first work function metal layer having a taper top, a second work function metal layer formed on the first work function metal laver, and a top barrier layer and a gap-filling metal layer formed on the second work function metal layer, the first work function metal layer and the second work function metal layer being complementary to each other; and

a second metal gate positioned on the substrate, the second metal gate comprising the second work function metal layer, and the top barrier layer and the gap-filling metal layer formed on the second work function metal layer.

2. The semiconductor device having the metal gate according to claim 1 , wherein the taper top of the first work function metal layer comprises an included angle, and the include angle is smaller than 45°.

3. The semiconductor device having the metal gate according to claim 1 , wherein the first metal gate further comprises a high-k gate dielectric layer, a bottom barrier layer and an etch stop layer, formed under the first work function metal layer.

4. The semiconductor device having the metal gate according to claim 3 , wherein the second metal gate further comprises the high-k gate dielectric layer, the bottom barrier layer and the etch stop layer formed under the second work function metal layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2014
From: LU, CHIA-LIN; CHEN, CHUN-LUNG; LIAO, KUN-YUAN; CHANG, FENG-YI
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 033916/0990 →
Priority Claims (1)
CN 2014 1 0454861 · Sep 9, 2014 · national
Continuity (1)
Related Publication 20160071944A1 · Mar 10, 2016