Select device for memory cell applications
The present disclosure includes select devices and methods of using select device for memory cell applications. An example select device includes a first electrode having a particular geometry, a semiconductor material formed on the first electrode and a second electrode having the particular geometry with formed on the semiconductor material, wherein the select device is configured to snap between resistive states in response to signals that are applied to the select device.
1. A memory cell, comprising:
a select device including:
a first electrode having a particular geometry;
a semiconductor material formed on the first electrode;
a second electrode having the particular geometry formed on the semiconductor material, wherein the select device is configured to snap between resistive states in response to signals that are applied to the select device; and
an insulator material is formed on a sidewall of the first electrode, a sidewall of the semiconductor material, and a sidewall of the second electrode.
2. The memory cell of claim 1 , wherein the semiconductor is amorphous silicon.
3. The memory cell of claim 1 , wherein the select device includes a leakage current that scales with the area of the select device.
4. The memory cell of claim 1 , wherein a width of the semiconductor material is less than approximately 20 nanometers.
5. The memory cell of claim 1 , wherein an aspect ratio of the first electrode is greater than 10.
6. The memory cell of claim 1 , wherein the first electrode and the second electrode include titanium silicon nitride (TiSiN).
7. The memory cell of claim 1 , wherein the first electrode and the second electrode include tantalum nitride (TaN).
8. The memory cell of claim 1 , wherein the first electrode and the second electrode include optical adsorbers.
9. A memory cell, comprising:
a select device including:
a first electrode having a particular geometry;
a semiconductor material formed on the first electrode;
a second electrode having the particular geometry formed on the semiconductor material; and
an insulator material formed on a sidewall of the first electrode, a sidewall of the semiconductor material, and a sidewall of the second electrode.
10. The memory cell of claim 9 , wherein the semiconductor material is doped with carbon.
11. The memory cell of claim 9 , wherein the first electrode and the second electrode is doped with carbon.
12. The memory cell of claim 9 , wherein first electrode and the second electrode are formed of a metal/resistor laminate.
13. The memory cell of claim 9 , wherein the insulator material is silicon nitride.
14. The memory cell of claim 9 , wherein the insulator material has a dielectric constant that is greater than 10.
15. The memory cell of claim 9 , wherein the particular geometry is a circular geometry with a diameter of less than 20 nanometers.
16. The memory cell of claim 9 , including a resistive storage element in series with the select device.
17. The memory cell of claim 9 , wherein a half select ratio (HSR) of the resistive storage element is greater than 10 4 .
18. The memory cell of claim 9 , wherein the select device is supports bi-directional current flow therethrough.