IP Library › Granted Patent US 9,640,322
Granted Patent B2
US 9,640,322 · App. 14/516,730 · Granted May 2, 2017

Monolithic ceramic capacitor with internal conductor layers having different densities

Inventors: Hirokazu Takashima (Nagaokakyo, JP); Satoki Sakai (Nagaokakyo, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H01G4/12H01G4/012H01G4/232
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Quick Facts
Patent No.
US 9,640,322
App. No.
14/516,730
Granted
May 2, 2017
Kind
B2
Abstract

A monolithic ceramic capacitor includes an element body having therein a multilayer portion formed of a plurality of conductor layers and a plurality of ceramic dielectric layers alternately stacked in a thickness direction; and a first outer electrode and a second outer electrode provided on an outer portion of the element body. The element body is divided in the thickness direction into a thickness-direction first outer layer portion, a thickness-direction second outer layer portion, and a thickness-direction inner layer portion located between the thickness-direction first outer layer portion and the thickness-direction second outer layer portion and including the multilayer portion. A first conductor layer and a second conductor layer, which are outermost layers among the plurality of conductor layers, have lower conductor densities than any of conductor densities of the other conductor layers.

Claims (35)

1. A monolithic ceramic capacitor comprising:

an element body including a multilayer portion including a plurality of conductor layers and a plurality of ceramic dielectric layers alternately stacked in a thickness direction of the element body; and

an outer electrode provided on an outer portion of the element body; wherein

outer surfaces of the element body include a first principal surface and a second principal surface that are opposed to each other in the thickness direction, a first end surface and a second end surface that are opposed to each other in a length direction perpendicular or substantially perpendicular to the thickness direction, and a first side surface and a second side surface that are opposed to each other in a width direction perpendicular or substantially perpendicular to both the thickness direction and the length direction;

the element body is divided in the thickness direction into a thickness-direction first outer layer portion that includes a first ceramic dielectric layer and defines the first principal surface, a thickness-direction second outer layer portion that includes a second ceramic dielectric layer and defines the second principal surface, and a thickness-direction inner layer portion including the multilayer portion and located between the thickness-direction first outer layer portion and the thickness-direction second outer layer portion;

among the plurality of conductor layers included in the thickness-direction inner layer portion, a first conductor layer arranged at a position closest to the first principal surface is provided at a position adjacent to the first ceramic dielectric layer of the thickness-direction first outer layer portion;

among the plurality of conductor layers included in the thickness-direction inner layer portion, a second conductor layer arranged at a position closest to the second principal surface is provided at a position adjacent to the second ceramic dielectric layer of the thickness-direction second outer layer portion;

the outer electrode includes a first outer electrode provided to cover the first end surface, and a second outer electrode provided to cover the second end surface;

one portion of the plurality of conductor layers is connected to the first outer electrode through a first wiring portion extending from the multilayer portion toward the first end surface side;

another portion of the plurality of conductor layers is connected to the second outer electrode through a second wiring portion extending from the multilayer portion toward the second end surface side;

the element body is divided in the length direction into a length-direction first outer layer portion that includes portions of the conductor layer and the ceramic dielectric layer corresponding to the first wiring portion and defines the first end surface, a length-direction second outer layer portion that includes portions of the conductor layer and the ceramic dielectric layer corresponding to the second wiring portion and defines the second end surface, and a length-direction inner layer portion that includes the multilayer portion and is located between the length-direction first outer layer portion and the length-direction second outer layer portion;

a conductor density in a length-direction first end portion region located at the first end surface side in the multilayer portion, and a conductor density in a length-direction second end portion region located at the second end surface side in the multilayer portion are lower than a conductor density in a length-direction center portion region located at a center in the length direction in the multilayer portion;

the element body is divided in the width direction into a width-direction first outer layer portion that includes the ceramic dielectric layer and defines the first side surface, a width-direction second outer layer portion that includes the ceramic dielectric layer and defines the second side surface, and a width-direction inner layer portion that includes the multilayer portion and is located between the width-direction first outer layer portion and the width-direction second outer layer portion;

a conductor density in a width-direction first end portion region located at the first side surface side in the multilayer portion, and a conductor density in a width-direction second end portion region located at the second side surface side in the multilayer portion are lower than a conductor density in a width-direction center portion region located at the center in the width direction in the multilayer portion; and

the conductor densities of the first conductor layer and the second conductor layer are lower than the conductor densities in the length-direction first end portion region, the length-direction second end portion region, the width-direction first end portion region, and the width-direction second end portion region, by about 10%.

2. The monolithic ceramic capacitor according to claim 1 , wherein

the first conductor layer and the second conductor layer each include a plurality of fine through holes penetrating through the first conductor layer and the second conductor layer in the thickness direction; and

the plurality of through holes are filled with a ceramic dielectric material.

3. The monolithic ceramic capacitor according to claim 1 , wherein

a portion of the conductor layer connected to the second outer electrode and included in the length-direction first end portion region among the plurality of conductor layers, and a portion of the conductor layer connected with the first outer electrode and included in the length-direction second end portion region among the plurality of conductor layers include a plurality of fine through holes penetrating through the portions of the conductor layers in the thickness direction; and

the plurality of through holes are filled with the ceramic dielectric material.

4. The monolithic ceramic capacitor according to claim 1 , wherein

portions included in the width-direction first end portion region and the width-direction second end portion region among the plurality of conductor layers include a plurality of through holes penetrating through the conductor layers in the thickness direction; and

the plurality of through holes are filled with the ceramic dielectric material.

5. The monolithic ceramic capacitor according to claim 1 , wherein the first conductor layer and the second conductor layer are floating conductor layers not connected with the outer electrode.

6. The monolithic ceramic capacitor according to claim 1 , wherein the element body has a rectangular or substantially rectangular parallelepiped shape.

7. The monolithic ceramic capacitor according to claim 1 , wherein the plurality of ceramic dielectric layers include barium titanate.

8. The monolithic ceramic capacitor according to claim 7 , wherein the plurality of ceramic dielectric layers further include at least one of a Mn compound, a Mg compound, a Si compound, a Co compound, a Ni compound, and a rare-earth compound.

9. The monolithic ceramic capacitor according to claim 1 , wherein the plurality of conductor layers are made of Ni or Cu.

10. The monolithic ceramic capacitor according to claim 1 , wherein the outer electrode is defined by a multilayer film.

11. The monolithic ceramic capacitor according to claim 10 , wherein the multilayer film includes a sintered metal layer disposed on the outer portion of the element body and a plated layer disposed on the sintered metal layer.

12. The monolithic ceramic capacitor according to claim 11 , wherein the sintered metal layer is made of a sintered conductor paste including at least one of Cu, Ni, Ag, Pd, an Ag—Pd alloy, and Au.

13. The monolithic ceramic capacitor according to claim 11 , wherein the plated layer is one of a Cu plated layer and an Au plated layer.

14. The monolithic ceramic capacitor according to claim 1 , wherein a thickness of the first conductor layer and the second conductor layer is smaller than a thickness of the other conductor layer located between the first and second conductor layers.

15. The monolithic ceramic capacitor according to claim 1 , wherein edge portions and corner portions of the element body are rounded.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2014
From: TAKASHIMA, HIROKAZU; SAKAI, SATOKI
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 033970/0900 →
Priority Claims (2)
JP 2013-224114 · Oct 29, 2013 · national
JP 2014-154901 · Jul 30, 2014 · national
Continuity (1)
Related Publication 20150116898A1 · Apr 30, 2015