Phase change memory element
A phase-change memory element with an electrically isolated conductor is provided. The phase-change memory element includes: a first electrode and a second electrode; a phase-change material layer electrically connected to the first electrode and the second electrode; and at least two electrically isolated conductors, disposed between the first electrode and the second electrode, directly contacting the phase-change material layers.
1. A phase-change memory, comprising:
a first electrode;
a second electrode;
an electrically-isolated conductor located between the first electrode and the second electrode; and
a phase-change material that contacts each of the first electrode, the second electrode, and the electrically-isolated conductor;
wherein the electrically-isolated conductor includes at least one of a thickness greater than a width of the phase-change material or a tapered end.
2. The phase-change memory of claim 1 , wherein the first electrode and the second electrode are coplanar.
3. The phase-change memory of claim 1 , wherein the second electrode is formed above the first electrode.
4. The phase-change memory of claim 1 , further comprising:
a transistor formed on the substrate, wherein a source or a drain of the transistor is electrically connected to the first electrode.
5. The phase-change memory of claim 4 , wherein at least a portion of the transistor is located below a surface of the substrate.
6. The phase-change memory of claim 5 , wherein the source or the drain is electrically connected to the first electrode via a metal plug formed in a hole on the surface of the substrate.
7. The phase-change memory of claim 1 , further comprising:
a diode formed on the substrate, wherein a terminal of the diode is electrically connected to the first electrode.
8. The phase-change memory of claim 1 , further comprising:
a complementary metal oxide semiconductor (CMOS) circuit formed on the substrate, wherein a terminal of the CMOS circuit is electrically connected to the first electrode.
9. The phase-change memory of claim 1 , wherein the electrically-isolated conductor comprises a plurality of electrically-isolated conductors.
10. The phase-change memory of claim 9 , wherein the electrically-isolated conductors of the plurality are separated by a dielectric layer.
11. The phase-change memory of claim 1 , wherein a memory cell corresponding to the electrically-isolated conductor comprises a multi-level memory cell.
12. The phase-change memory of claim 1 , wherein the phase change material comprises In, Ge, Sb, Te, Ga, Sn, or combinations thereof.
13. The phase-change memory of claim 1 , wherein the first electrode and the second electrode are independent and respectively comprise Al, W, Mo, Ti, TiN, TiAlN, TiW, or TaN.
14. The phase-change memory of claim 1 , wherein the electrically-isolated conductor comprises Al, W, Mo, Ti, TiN, TiAlN, TiW, or TaN.
15. The phase-change memory of claim 1 , wherein the first electrode and the second electrode are formed by the same process and made of the same material.
16. The phase-change memory of claim 1 , wherein the first electrode is electrically connected to an electrical element via a first metal plug.
17. The phase-change memory of claim 1 , wherein the second electrode is electrically connected to a bit line via a metal plug.
18. The phase-change memory of claim 1 , wherein the phase-change memory element comprises a pillar structure.
19. A phase-change memory, comprising:
a first electrode;
a second electrode;
an electrically-isolated conductor located between the first electrode and the second electrode; and
a phase-change material that contacts each of the first electrode, the second electrode, and the electrically-isolated conductor;
wherein the electrically-isolated conductor includes a thickness greater than a width of the phase-change material.
20. A phase-change memory, comprising:
a first electrode;
a second electrode;
an electrically-isolated conductor located between the first electrode and the second electrode; and
a phase-change material that contacts each of the first electrode, the second electrode, and the electrically-isolated conductor;
wherein the electrically-isolated conductor includes a pointed top.