Scalable digital predistortion system
View Patent ↗The scalable digital predistortion system and method provides compensation for the nonlinear distortions of power amplifiers and transmitters. The scalable digital predistortion system and its associated update algorithms provide scalability in terms of signal bandwidth and average power, allowing for low complexity updates following changes in the signal's bandwidth and/or power level. The method applies both memory polynomial functions and memoryless predistortion functions for compensating for the nonlinear distortions.
1. A scalable digital predistortion method for linearizing a power amplifier, comprising the steps of:
establishing a memoryless look-up table bank stored in computer readable memory, the memoryless look-up table bank having a set of memoryless predistortion functions stored therein indexed by average power values;
storing memory polynomial size parameters indexed by bandwidth in the computer readable memory, the size parameters including nonlinearity order and memory depth;
receiving a signal;
estimating an average power of the signal;
measuring bandwidth of the signal;
determining a nonlinearity order and a memory depth of a memory polynomial function associated with the bandwidth of the signal from the memory polynomial size parameters stored in the computer readable memory;
applying the memory polynomial function to the signal to generate a first modified signal;
determining a memoryless predistortion function associated with the estimated average power of the signal from the memoryless look-up table bank;
applying the memoryless predistortion function to the first modified signal to generate a second modified signal;
inputting the second modified signal to a power amplifier to produce an amplified signal;
outputting the amplified signal from the power amplifier; and
estimating a set of coefficients of the memory polynomial function based on the nonlinearity order, the memory depth, the first modified signal and the amplified signal to define the memory polynomial function.
2. The scalable digital predistortion method for linearizing a power amplifier as recited in claim 1 , wherein the step of estimating the average power of the signal comprises:
receiving L samples of the signal;
measuring the power of each of the L samples; and
averaging the L measured powers.
3. The scalable digital predistortion method for linearizing a power amplifier as recited in claim 1 , wherein the step of estimating the set of coefficients of the memory polynomial function comprises applying the Moore-Penrose pseudo-inverse method.
4. The scalable digital predistortion method for linearizing a power amplifier as recited in claim 1 , further comprising the steps of:
converting the second modified signal from digital to analog; and
up-converting the second modified signal around a carrier frequency of the signal.
5. The scalable digital predistortion method for linearizing a power amplifier as recited in claim 4 , further comprising the steps of:
down-converting the amplified signal; and
converting the amplified signal from analog to digital.