IP Library Granted Patent US 9,536,739
Granted Patent B2
US 9,536,739 · App. 14/525,484 · Granted Jan 3, 2017

Self-cut sidewall image transfer process

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,536,739
App. No.
14/525,484
Granted
Jan 3, 2017
Kind
B2
Abstract

A plurality of mandrels is formed on a silicon substrate. The mandrels are spaced apart at a given pitch, wherein at least one of the plurality of mandrels is formed having a first width, and at least another one of the plurality of mandrels is formed having a second width, and wherein the first width is greater than the second width. At least one structure is formed by removing at least a portion of the plurality of mandrels in a sidewall image transfer process without using a cut mask.

Claims (18)

1. A method comprising:

forming a hard mask on a silicon substrate;

forming a plurality of mandrels on the hard mask, and depositing a dielectric layer over the plurality of mandrels and the hard mask;

wherein said plurality of mandrels are spaced apart at a given pitch, wherein at least one of the plurality of mandrels is formed having a first width, and at least another one of the plurality of mandrels is formed having a second width, wherein the first width is greater than the second width; and

forming at least one structure by performing a sidewall image transfer process without using a cut mask, wherein forming the at least one structure by performing the sidewall image transfer process without using a cut mask comprises:

etching the dielectric layer to form sidewalls on the sides of each of the mandrels;

removing the plurality of mandrels to form a pattern of sidewalls;

etching the pattern of sidewalls to form a plurality of layered stacks each comprising a given sidewall, the hard mask and the silicon substrate, wherein the layered stacks comprise one or more first layered stacks having a first layered stack thickness and one or more second layered stacks having a second layered stack thickness, wherein the second layered stack thickness is greater than the first layered stack thickness, wherein the first layered stacks comprise first sidewalls having a first thickness, and wherein the second layered stacks comprise second sidewalls having a second thickness;

etching the first and second layered stacks to remove an entirety of the first sidewalls, wherein the etching leaves remaining second sidewalls from the second sidewalls;

depositing a dielectric layer, planarizing said dielectric layer to be coplanar to a top surface of the remaining second sidewalls, and etching to remove the second layered stacks; and

removing the planarized dielectric layer to expose the at least one structure.

2. The method of claim 1 , wherein a first space is formed between a first mandrel having the first width and an adjacent second mandrel having the first width.

3. The method of claim 2 , wherein a second space is formed between a first mandrel having the first width and an adjacent second mandrel having the second width.

4. The method of claim 3 , wherein a third space is formed between a first mandrel having the second width and an adjacent second mandrel having the second width.

5. The method of claim 4 , wherein the third space has a width greater than the width of the second space, and wherein the second space has a width greater than the width of the first space.

6. The method of claim 5 , wherein the sidewalls formed in the first space merge together, substantially filling the first space, the merged sidewalls forming a sidewall having a second thickness.

7. The method of claim 5 , wherein the sidewalls formed in the second space partially fill the second space, leaving a space between the sidewalls.

8. The method of claim 5 , wherein the sidewalls formed in the third space partially fill the third space, leaving a space between the sidewalls.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: ELPIS TECHNOLOGIES INC.
Reel/Frame 052620/0961 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 28, 2014
From: LEOBANDUNG, EFFENDI
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 034049/0345 →