IP Library › Granted Patent US 9,166,058
Granted Patent B2
US 9,166,058 · App. 14/529,529 · Granted Oct 20, 2015

Method for manufacturing semiconductor device

Inventors: Hidekazu Miyairi (Isehara, JP); Kengo Akimoto (Atsugi, JP); Yasuo Nakamura (Machida, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/78693H01L21/02565H01L21/465H01L21/467H01L21/4763H01L21/47635H01L29/66969H01L29/78606
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Quick Facts
Patent No.
US 9,166,058
App. No.
14/529,529
Granted
Oct 20, 2015
Kind
B2
Abstract

To provide a method by which a semiconductor device including a thin film transistor with excellent electric characteristics and high reliability is manufactured with a small number of steps. After a channel protective layer is formed over an oxide semiconductor film containing In, Ga, and Zn, a film having n-type conductivity and a conductive film are formed, and a resist mask is formed over the conductive film. The conductive film, the film having n-type conductivity, and the oxide semiconductor film containing In, Ga, and Zn are etched using the channel protective layer and gate insulating films as etching stoppers with the resist mask, so that source and drain electrode layers, a buffer layer, and a semiconductor layer are formed.

Claims (58)

1. A method for manufacturing a semiconductor device comprising:

forming a gate electrode layer over a substrate;

forming a gate insulating layer over the gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer, the oxide semiconductor layer including indium, gallium and zinc;

forming an insulating layer over a channel formation region of the oxide semiconductor layer;

forming a conductive layer over the oxide semiconductor layer with an oxide including titanium interposed therebetween;

forming a resist mask over the conductive layer;

etching the conductive layer, the oxide and the oxide semiconductor layer using the resist mask so as to recess the conductive layer from the oxide; and

heating the oxide semiconductor layer.

2. The method for manufacturing a semiconductor device according to claim 1 , further comprising the step of:

performing a plasma treatment to the oxide semiconductor layer,

wherein the substrate is kept in a non-bias state in the step of performing the plasma treatment.

3. The method for manufacturing a semiconductor device according to claim 1 , wherein the gate insulating layer contains excessive oxygen.

4. The method for manufacturing a semiconductor device according to claim 1 , wherein the oxide semiconductor layer contains excessive oxygen.

5. A method for manufacturing a semiconductor device comprising:

forming a gate electrode layer over a substrate;

forming a gate insulating layer over the gate electrode layer;

forming an oxide semiconductor layer over the gate insulating layer, the oxide semiconductor layer including indium, gallium and zinc;

forming an insulating layer over a channel formation region of the oxide semiconductor layer;

forming a conductive layer over the oxide semiconductor layer with an oxide including titanium interposed therebetween;

forming a resist mask over the conductive layer;

etching the conductive layer, the oxide and the oxide semiconductor layer using the resist mask so as to recess the conductive layer from the oxide; and

heating the oxide semiconductor layer,

wherein a composition ratio of the zinc is lower than a composition ratio of the indium in the oxide semiconductor layer, and

wherein the composition ratio of the zinc is lower than a composition ratio of the gallium in the oxide semiconductor layer.

6. The method for manufacturing a semiconductor device according to claim 5 , further comprising the step of:

performing a plasma treatment to the oxide semiconductor layer,

wherein the substrate is kept in a non-bias state in the step of performing the plasma treatment.

7. The method for manufacturing a semiconductor device according to claim 5 , wherein the gate insulating layer contains excessive oxygen.

8. The method for manufacturing a semiconductor device according to claim 5 , wherein the oxide semiconductor layer contains excessive oxygen.

9. A semiconductor device comprising:

a gate electrode;

a gate insulating layer over the gate electrode;

an oxide semiconductor layer over the gate insulating layer, the oxide semiconductor layer including indium, gallium and zinc;

an insulating layer over a channel formation region of the oxide semiconductor layer;

a first conductive layer over the oxide semiconductor layer;

a second conductive layer over the oxide semiconductor layer;

a first oxide between the oxide semiconductor layer and the first conductive layer, the first oxide including titanium; and

a second oxide between the oxide semiconductor layer and the second conductive layer, the second oxide including titanium,

wherein the first oxide comprises a lower end portion that extends beyond a lower end portion of the first conductive layer, and

wherein the second oxide comprises a lower end portion that extends beyond a lower end portion of the second conductive layer.

10. The semiconductor device according to claim 9 , wherein the gate insulating layer contains excessive oxygen.

11. The semiconductor device according to claim 9 , wherein the oxide semiconductor layer contains excessive oxygen.

12. A semiconductor device comprising:

a gate electrode;

a gate insulating layer over the gate electrode;

an oxide semiconductor layer over the gate insulating layer, the oxide semiconductor layer including indium, gallium and zinc;

an insulating layer over a channel formation region of the oxide semiconductor layer;

a first conductive layer over the oxide semiconductor layer;

a second conductive layer over the oxide semiconductor layer;

a first oxide between the oxide semiconductor layer and the first conductive layer, the first oxide including titanium; and

a second oxide between the oxide semiconductor layer and the second conductive layer, the second oxide including titanium,

wherein the first oxide comprises a lower end portion that extends beyond a lower end portion of the first conductive layer,

wherein the second oxide comprises a lower end portion that extends beyond a lower end portion of the second conductive layer,

wherein a composition ratio of the zinc is lower than a composition ratio of the indium in the oxide semiconductor layer, and

wherein the composition ratio of the zinc is lower than a composition ratio of the gallium in the oxide semiconductor layer.

13. The semiconductor device according to claim 12 , wherein the gate insulating layer contains excessive oxygen.

14. The semiconductor device according to claim 12 , wherein the oxide semiconductor layer contains excessive oxygen.

Priority Claims (1)
JP 2008-206006 · Aug 8, 2008 · national
Continuity (4)
Continuation 14260598 · Apr 24, 2014
Continuation 13727056 · Dec 26, 2012
Continuation 12535713 · Aug 5, 2009
Related Publication 20150048371A1 · Feb 19, 2015