ARC residue-free etching
View Patent ↗Antireflective residues during pattern transfer and consequential short circuiting are eliminated by employing an underlying sacrificial layer to ensure complete removal of the antireflective layer. Embodiments include forming a hard mask layer over a conductive layer, e.g., a silicon substrate, forming the sacrificial layer over the hard mask layer, forming an optical dispersive layer over the sacrificial layer, forming a silicon anti-reflective coating layer over the optical dispersive layer, forming a photoresist layer over the silicon anti-reflective coating layer, where the photoresist layer defines a pattern, etching to transfer the pattern to the hard mask layer, and stripping at least the optical dispersive layer and the sacrificial layer.
1. A device comprising:
a conductive pattern formed on a silicon substrate using a patterning stack including a hard mask layer formed over the silicon substrate, a sacrificial layer formed over the hard mask layer, an optical dispersive layer formed over the sacrificial layer, a silicon anti-reflective coating layer formed over the optical dispersive layer, and a photoresist layer formed over the silicon anti-reflective coating layer in a pattern, wherein the conductive pattern is formed by etching to transfer the pattern to the hard mask layer, and stripping at least the optical dispersive layer and the sacrificial layer, and wherein no or substantially no residue from the silicon anti-reflective coating layer remains after the stripping, wherein the sacrificial layer comprises an amorphous carbon material and extends over a side portion of the hard mask layer.
2. The device according to claim 1 , further comprising a conductive material over the silicon substrate, wherein the conductive material is etched through the hard mask to form the pattern therein.
3. The device according to claim 1 , further comprising:
a titanium nitride layer over the silicon substrate;
an amorphous silicon layer over the titanium nitride layer; and
the hard mask layer on the amorphous silicon layer.
4. The device according to claim 3 , further comprising a high-κ dielectric material layer over the silicon substrate, wherein the titanium nitride layer is over the high-κ dielectric material layer.
5. The device according to claim 1 , wherein the hard mask layer has a thickness of 30 Å to 400 Å.
6. The device according to claim 1 , wherein the silicon anti-reflective coating layer is completely removed during the etching.
7. The device according to claim 1 , wherein the etching includes etching through the sacrificial layer to the hard mask layer, which results in completely removing the silicon anti-reflective coating layer during the etching.
8. The device according to claim 1 , wherein the silicon anti-reflective coating layer is partially removed during the etching, and any remaining portion of the silicon anti-reflective coating layer is completely removed during stripping.
9. The device according to claim 1 , wherein the sacrificial layer has a thickness of 50 Å to 500 Å.
10. A device comprising:
a silicon substrate;
a conductive material over the silicon substrate;
a pattern formed in the conductive material using a patterning stack including a hard mask layer having a thickness of 30 Å to 400 Å formed over the conductive material, a sacrificial layer formed over the hard mask layer, an optical dispersive layer formed over the sacrificial layer, a silicon anti-reflective coating layer formed over the optical dispersive layer, and a photoresist layer formed over the silicon anti-reflective coating layer in the pattern,
wherein the pattern is formed by etching to transfer the pattern to the hard mask layer, stripping at least the optical dispersive layer and the sacrificial layer, and etching the conductive material through the patterned hard mask layer;
wherein no or substantially no residue from the silicon anti-reflective coating layer remains after the stripping, wherein the sacrificial layer comprises an amorphous carbon material and extends over a side portion of the hard mask layer.
11. The device according to claim 10 , wherein the conductive material comprises:
a titanium nitride layer over the silicon substrate; and
an amorphous silicon layer over the titanium nitride layer,
wherein the hard mask layer is over the amorphous silicon layer.
12. The device according to claim 11 , further comprising a high-κ dielectric material layer over the silicon substrate, wherein the titanium nitride layer is over the high-κ dielectric material layer.
13. The device according to claim 10 , wherein the silicon anti-reflective coating layer is completely removed during the etching of the conductive material.
14. The device according to claim 10 , wherein the etching of the conductive material includes etching through the sacrificial layer to the hard mask layer, which results in completely removing the silicon anti-reflective coating layer during the etching of the conductive material.
15. The device according to claim 10 , wherein the silicon anti-reflective coating layer is partially removed during the etching of the conductive material, and any remaining portion of the silicon anti-reflective coating layer is completely removed during stripping.
16. The device according to claim 10 , wherein the sacrificial layer has a thickness of 50 Å to 500 Å.