Exporting computational capabilities into a block-oriented disk memory
A memory controller is provided that includes a host system interface that receives requests from applications and sends read or write commands to a disk for data retrieval. A threadlet core provides threadlets to the host system interface that enable the host system interface to use a logical bit address that can be sent to a memory device for execution without having to read and write entire blocks to and from the memory device.
1. A memory controller comprising:
a host system interface that receives requests from applications and sends read or write commands to a disk for data retrieval; and
a threadlet core that provides threadlets to the host system interface that enable the host system interface to use a logical bit address that can be sent to a memory device for execution without having to read and write entire blocks to and from the memory device.
2. The memory controller of claim 1 , wherein the host system interface comprise PCI Express.
3. The memory controller of claim 1 , wherein the memory device comprises a flash drive.
4. The memory controller of claim 1 , wherein the threadlets comprise an indication that a threadlet is not a conventional command.
5. The memory controller of claim 1 , wherein the threadlets comprise an address, typically based on an LBA for compatibility with conventional disk reads and writes, that points to data within a flash drive against which some function is to be initially performed.
6. The memory controller of claim 1 , wherein the threadlets comprise information as to how to communicate back to the host system interface upon completion.
7. The memory controller of claim 1 , wherein the threadlets perform atomic operations, where an update to some addressed field within a block is performed inside the memory device, with a guarantee there is no possible interference from other updates to the same or nearby fields.
8. The memory controller of claim 1 , wherein the threadlets spawn other threadlets that execute against the same or other regions of the memory device, independent of the parent threadlets.
9. The memory controller of claim 1 , wherein the threadlets are executed within a flash drive.
10. The memory controller of claim 1 , wherein the threadlets are executed regardless of where the associated data resides on different disks or storage media.
11. A method of controlling commands sent to a memory device comprising:
receiving requests from applications to send read or write commands to a disk for data retrieval using a host system interface; and
generating threadlets to the host system interface using a threadlet core that enable the host system interface to use a selective number of bits that can be sent to a memory device for execution without having to read and write entire blocks to and from the memory device.
12. The method of claim 11 , wherein the host system interface comprise PCI Express.
13. The method of claim 11 , wherein the memory device comprises a flash drive.
14. The method of claim 11 , wherein the threadlets comprise an indication that a threadlet is not a conventional command.
15. The method of claim 11 . wherein the threadlets comprise an address, typically based on an LBA for compatibility with conventional disk reads and writes, that points to data within a flash drive against which some function is to be initially performed.
16. The method of claim 11 , wherein the threadlets comprise information as to how to communicate back to the host system interface upon completion.
17. The method of claim 11 , wherein the threadlets perform atomic operations, where an update to some addressed field within a block is performed inside the memory device, with a guarantee there is no possible interference from other updates to the same or nearby fields.
18. The method of claim 11 , wherein the threadlets spawn other threadlets that execute against the same or other regions of the memory device, independent of the parent threadlets.
19. The method of claim 11 , wherein the threadlets are executed within a flash drive.
20. The method of claim 11 , wherein the threadlets are executed regardless of where the associated data resides on different disks or storage media.
21. A method of performing the operations of a memory device comprising:
constructing a threadlet and providing an offset to a location where initial threadlet processing is to be performed;
computing matching logical bit address (LBA) within the memory device;
assembling and sending the threadlet to the memory device;
placing the threadlet in a queue for execution while dequeueing a previously executed threadlet;
determining if a block of data is in a second memory device and executing the commands of the queued threadlets, and if the block of data is not in the second memory device suspending and enqueing a command to read the block of data.
22. The method of claim 21 , wherein the threadlets are executed using a network interface controller (NIC).
23. The method of claim 22 , wherein the NIC identifies if an incoming packet from a host s a threadlet rather than a conventional command, and sends the threadlet to a threadlet core for execution.