IP Library › Granted Patent US 9,673,053
Granted Patent B2
US 9,673,053 · App. 14/549,529 · Granted Jun 6, 2017

Method for fabricating semiconductor device

Inventors: Rung-Yuan Lee (New Taipei, TW); Yu-Ting Li (Chiayi, TW); Jing-Yin Jhang (Tainan, TW); Chen-Yi Weng (New Taipei, TW); Jia-Feng Fang (Changhua County, TW); Yi-Wei Chen (Taichung, TW); Wei-Jen Wu (Tainan, TW); Po-Cheng Huang (Kaohsiung, TW); Fu-Shou Tsai (Keelung, TW); Kun-Ju Li (Tainan, TW); Wen-Chin Lin (Tainan, TW); Chih-Chien Liu (Taipei, TW); Chih-Hsun Lin (Ping-Tung County, TW); Chun-Yuan Wu (Yun-Lin County, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H01L21/30625H01L21/28123
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,673,053
App. No.
14/549,529
Granted
Jun 6, 2017
Kind
B2
Abstract

A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a first material layer on the substrate; forming a stop layer on the first material layer; forming a second material layer on the stop layer; and performing a planarizing process to remove the second material layer, the stop layer, and part of the first material layer for forming a gate layer.

Claims (10)

1. A method for fabricating semiconductor device, comprising:

providing a substrate;

forming a first material layer on the substrate;

forming a stop layer on the first material layer;

forming a second material layer on the stop layer;

performing a chemical mechanical polishing (CMP) process to remove part of the second material layer;

performing a first etching process to remove the remaining second material layer; and

performing a second etching process to remove the stop layer for forming a gate layer.

2. The method of claim 1 , wherein the first etching process comprises an anisotropic etching process.

3. The method of claim 1 , wherein the second etching process comprises an anisotropic etching process.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE FIRST ASSIGNOR FROM RUAN-YUAN LEE TO RUNG-YUAN LEE PREVIOUSLY RECORDED ON REEL 034225 FRAME 0362. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF ASSIGNORS INTEREST. Recorded Dec 8, 2015
From: LEE, RUNG-YUAN; LI, YU-TING; JHANG, JING-YIN; WENG, CHEN-YI; FANG, JIA-FENG; CHEN, YI-WEI; WU, WEI-JEN; HUANG, PO-CHENG; TSAI, FU-SHOU; LI, KUN-JU; LIN, WEN-CHIN; LIU, CHIH-CHIEN; LIN, CHIH-HSUN; WU, CHUN-YUAN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 037300/0693 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2014
From: LEE, RUAN-YUAN; LI, YU-TING; JHANG, JING-YIN; WENG, CHEN-YI; FANG, JIA-FENG; CHEN, YI-WEI; WU, WEI-JEN; HUANG, PO-CHENG; TSAI, FU-SHOU; LI, KUN-JU; LIN, WEN-CHIN; LIU, CHIH-CHIEN; LIN, CHIH-HSUN; WU, CHUN-YUAN
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 034225/0362 →
Continuity (1)
Related Publication 20160148816A1 · May 26, 2016