Methods and apparatus for link training, initialization and management via a high speed bus interface
Apparatus and methods for training, initializing, and managing a unidirectional, sink-driven A/V interface of a consumer electronics device. Since camera sensors do not have significant processing capability, the disclosed embodiments couple the camera sensors to a simplified source node as a camera assembly. In the described embodiments, an intelligent receiver (e.g., a master “sink” node) trains, initializes, and manages one or more relatively low complexity camera sensor modules. Various other refinements and simplifications include: (i) where link training is managed by the receiver of the link, not by the transmitter, and (ii) where training multiple links in the network is managed by a single receiver.
1. A method for link initialization of a unidirectional interface of an electronic device performed by a master sink node, comprising:
discovering one or more other nodes of a network, the one or more other nodes comprising a source node and a concentrator node, the concentrator node being configured to aggregate data streams from multiple source nodes to the master sink node;
setting first bandwidth requirements for the source node;
setting second bandwidth requirements for the concentrator node;
configuring the source node for link initialization by identifying a test pattern to transmit;
configuring the concentrator node for link initialization by identifying the test pattern to receive;
causing the source and concentrator nodes to perform a test characterized by the test pattern; and
querying the concentrator node for a status of the test.
2. The method of claim 1 , further comprising instructing the source node to generate video content.
3. The method of claim 1 , further comprising enabling the network when each one of the one or more other nodes have successfully completed the test.
4. The method of claim 1 , wherein the test comprises a clock recovery test and the method further comprises instructing the source node to repeatedly transmit a repeating test pattern having clock-like content.
5. The method of claim 4 , further comprising receiving a report of successful clock recovery.
6. The method of claim 4 , wherein the querying of the concentrator node for the status of the test comprises polling the concentrator node for the status of the clock recovery test.
7. The method of claim 1 , wherein the causing the source and concentrator nodes to perform the test further comprises instructing the source node to repeatedly transmit one or more test patterns having data-like content.
8. The method of claim 7 , further comprising receiving a report of successful symbol lock.
9. The method of claim 7 , further comprising causing the execution of an interlane alignment test, the interlane alignment test being performed subsequent to the test.
10. A master sink node configured to perform link initialization of a unidirectional interface of an electronic device, comprising:
a processing apparatus configured to discover one or more other nodes of a network, the one or more other nodes comprising a source node and a concentrator node, the concentrator node being configured to aggregate data streams from multiple source nodes to the master sink node;
the processing apparatus further configured to identify a test pattern to be performed by the source node and the concentrator node;
the processing apparatus further configured to cause the source node and the concentrator node to perform a test characterized by the test pattern; and
the master sink node is further configured to receive a status of the test.
11. The master sink node of claim 10 , wherein the master sink node is further configured to instruct the source node to generate video content.
12. The master sink node of claim 11 , wherein the master sink node is further configured to enable the network when the source node and the concentrator node have successfully completed the test.
13. The master sink node of claim 12 , wherein the master sink node is further configured to enable the network when each of the one or more other nodes of the network have successfully completed the test.
14. The master sink node of claim 10 , wherein the test comprises a clock recovery test and the master sink node is further configured to instruct the source node to repeatedly transmit a repeating test pattern having clock-like content.
15. The master sink node of claim 14 , wherein the status of the test further comprises a report of successful clock recovery.
16. The master sink node of claim 14 , wherein the status of the test is received in response to a query issued by the master sink node.
17. The master sink node of claim 10 , wherein the test comprises a symbol lock test, the symbol lock test characterized by the repeated transmission of data-like content.
18. The master sink node of claim 17 , wherein the status of the test comprises a report of successful clock recovery.
19. The master sink node of claim 18 , wherein the master sink node is further configured to cause the execution of an interlane alignment test, the interlane alignment test being performed subsequent to the test.
20. A non-transitory computer-readable storage apparatus comprising a plurality of instructions that are configured to, when executed by a processor, cause a master sink node of an electronic device to:
discover one or more other nodes of a network, the one or more other nodes comprising a source node and a concentrator node, the concentrator node being configured to aggregate data streams from multiple source nodes;
set a first bandwidth requirement for the source node;
set a second bandwidth requirement for the concentrator node;
configure the source node for link initialization through the identification of a test pattern;
configure the concentrator node for link initialization through the identification of the test pattern;
cause the source and concentrator nodes to perform a test characterized by the test pattern; and
receive a status of the test.