Polymer on graphene
A top-gated graphene field effect transistor can be fabricated by forming a layer of graphene on a substrate, and applying an electrochemical deposition process to deposit a layer of dielectric polymer on the graphene layer. An electric potential between the graphene layer and a reference electrode is cycled between a lower potential and a higher potential. A top gate is formed above the polymer.
1. A method of fabricating a graphene transistor, the method comprising:
forming a layer of graphene on a substrate;
applying an electrochemical deposition process to deposit a layer of dielectric polymer on the graphene layer;
forming a layer of second dielectric material on the dielectric polymer layer, the second dielectric material having a dielectric constant that is higher than the dielectric constant of the polymer; and
forming a top gate above the layer of second dielectric material.
2. The method of claim 1 in which a potential between the graphene layer and a reference electrode is cycled between a lower potential and a higher potential.
3. The method of claim 2 in which the lower potential is in a range between 0 to 0.5V, and the higher potential is in a range between 0.5V to 1.5V.
4. The method of claim 1 in which depositing the layer of dielectric polymer comprises depositing poly(phenylene oxide) on the graphene.
5. The method of claim 1 , comprising patterning the graphene to form a channel, and forming drain and source electrodes that are electrically coupled to the graphene.
6. The method of claim 1 in which applying an electrochemical deposition process comprises placing the graphene and the substrate in a solution that includes phenol and sulfuric acid.
7. The method of claim 1 in which depositing a layer of dielectric polymer comprises depositing a layer of dielectric polymer having a thickness that is less than 10 nm.
8. A method comprising:
forming a layer of two-dimensional material on a substrate, the two-dimensional material layer having a thickness less than 1 μm;
applying an electro-deposition process to deposit a dielectric polymer layer on the two-dimensional material, in which a rate of deposition of the polymer at a given location of the two-dimensional material decreases as a thickness of the polymer layer increases; and
forming a layer of dielectric material on the polymer layer, the dielectric material having a dielectric constant that is higher than the dielectric constant of the polymer layer.
9. The method of claim 8 in which the two-dimensional material has a thickness less than 100 nm.
10. The method of claim 8 in which the two-dimensional material has a thickness less than 10 nm.
11. The method of claim 8 in which the two-dimensional material comprises graphene.
12. The method of claim 8 , comprising patterning the graphene to form a channel of a field effect transistor, forming drain and source electrodes that are electrically coupled to the graphene, and forming a top gate above the polymer layer.
13. The method of claim 8 in which applying an electro-deposition process comprises causing the two-dimensional material to be in contact with a solution that includes phenol and sulfuric acid, and applying a potential between the two-dimensional material and a reference electrode to deposit a layer of poly(phenylene oxide) on the two-dimensional material.
14. The method of claim 13 in which applying a potential comprises cycling a potential between the two-dimensional material and a reference electrode between a lower potential and a higher potential, the lower potential being less than 0.5V, and the higher potential being in a range from 0.5V to 1.5V.
15. The method of claim 14 in which applying the potential comprises cycling the potential between the graphene and the reference electrode between about 0.1 V to about 0.9V.
16. The method of claim 13 in which forming a layer of two-dimensional material comprising forming a graphene layer having a thickness less than 3 nm, and depositing a polymer layer comprises depositing a polymer layer having a thickness less than 10 nm.
17. The method of claim 8 in which forming the layer of dielectric material comprise using atomic layer deposition to deposit the layer of dielectric material.
18. The method of claim 8 , comprising forming pores in the graphene layer when applying the electro-deposition.
19. The method of claim 8 in which applying an electro-deposition process comprises electro-polymerizing one or more monomers that include at least one of 4-chlorophenol, 2,6-dimethylphenol, or o-phenylenediamine.
20. The method of claim 8 in which forming a layer of two-dimensional material comprises forming a layer of phosphorene.
21. The method of claim 20 , comprising covering the phosphorene layer with the polymer layer to prevent oxidation of the phosphorene.
22. A method comprising:
forming a layer of two-dimensional material on a substrate;
performing electrochemical polymerization of phenol to form a layer of polymer on the two-dimensional material, the polymer comprising poly(phenylene oxide); and
forming a layer of dielectric material on the polymer layer, the dielectric material having a dielectric constant that is higher than the dielectric constant of the polymer layer.
23. The method of claim 22 in which forming a layer of two-dimensional material comprises forming a layer of graphene.
24. The method of claim 23 , comprising patterning the graphene to form a channel of a field effect transistor, forming drain and source electrodes on the graphene, and forming a top gate on the polymer layer.
25. The method of claim 22 in which performing electrochemical polymerization of phenol comprises applying an alternating voltage or current to a solution that includes phenol and sulfuric acid.
26. The method of claim 22 in which forming a layer of two-dimensional material comprises forming a layer of phosphorene.