Current source for voltage regulator and voltage regulator thereof

1. A current source for quickly adjusting a first output current comprises:

a constant current generation module, coupled to a control node, for generating a predefined current flowing through the control node in order to determine a voltage of the control node;

a capacitor, coupled to an output terminal of the current source;

a current variation detection module, coupled between the control node and the capacitor, for generating a variation on the voltage of the control node via the capacitor when the output terminal of the current source receives an instant current variation; and

a trans-conductance amplifier, coupled between the control node and the output terminal, for changing a magnitude of the first output current of the output terminal when the variation on the voltage of the control node is generated;

wherein the output terminal of the current source is coupled to a buffer, in order to control the buffer to output a second output current.

2. The current source of claim 1 , further comprising:

a resistor, coupled to the control node, for preventing the constant current generation module from generating another instant current to offset the variation on the voltage of the control node.

3. The current source of claim 1 , wherein the buffer is an N-type metal oxide semiconductor field-effect transistor (NMOS), having a drain coupled to a power supply terminal, a source coupled to the capacitor, and a gate coupled to the output terminal, wherein the current source controls the NMOS to output the second output current according to a load variation on the source of the NMOS.

4. The current source of claim 1 , wherein the constant current generation module comprises a current mirror, for controlling the magnitude of the first output current to be equal to the predefined current in a steady state.

5. A voltage regulator, comprising:

a buffer, coupled between an output terminal of the voltage regulator and a quick response control terminal, for generating an output current;

a current source, coupled to the buffer, comprising:

a constant current generation module, coupled to a control node, for generating a predefined current flowing through the control node in order to determine a voltage of the control node;

a capacitor, coupled to the output terminal of the voltage regulator;

a current variation detection module, coupled between the control node and the capacitor, for generating a variation on the voltage of the control node via the capacitor when the output terminal of the voltage regulator receives an instant current variation; and

a trans-conductance amplifier, coupled between the control node and the quick response control terminal, for generating an output signal on the quick response control terminal when the variation on the voltage of the control node is generated, in order to control the buffer to change a magnitude of the output current; and

a voltage regulation amplifier, coupled between the output terminal of the voltage regulator and the quick response control terminal, for maintaining an output voltage of the output terminal and determining a bias voltage of the quick response control terminal.

6. The voltage regulator of claim 5 , wherein the current source further comprises:

a resistor, coupled to the control node, for preventing the constant current generation module from generating another instant current to offset the variation on the voltage of the control node.

7. The voltage regulator of claim 5 , wherein the buffer is an N-type metal oxide semiconductor field-effect transistor (NMOS), having a drain coupled to a power supply terminal, a source coupled to the output terminal of the voltage regulator, and a gate coupled to the quick response control terminal.

8. The voltage regulator of claim 7 , wherein the quick response control terminal is coupled to an output terminal of the voltage regulation amplifier, in order to control the bias voltage of the quick response control terminal to be equal or close to the output voltage plus a threshold voltage of the NMOS.

9. The voltage regulator of claim 5 , further comprising:

a Miller compensation capacitor, coupled between the output terminal of the voltage regulator and an inverse output stage of the voltage regulation amplifier, for enhancing a loop stability of the voltage regulation amplifier and the buffer.