Method of manufacturing a back side illuminated (BSI) image sensor
Some embodiments of the present disclosure provide a method of manufacturing a back side illuminated (BSI) image sensor. The method includes receiving a semiconductive substrate; forming a transistor coupled to a photosensitive element at a front side of the semiconductive substrate; forming a deep trench isolation (DTI) at a back side of the semiconductive substrate; forming a doped layer conformally over the DTI; performing a microwave anneal over the back side; forming a non-transparent material inside the DTI; and forming a color filter over the doped layer.
1. A method of manufacturing a back side illuminated (BSI) image sensor, comprising:
receiving a semiconductive substrate;
forming a transistor coupled to a photosensitive element at a front side of the semiconductive substrate;
forming a deep trench isolation (DTI) at a back side of the semiconductive substrate;
forming a doped layer conformally over the DTI;
performing a microwave anneal over the back side;
forming a non-transparent material inside the DTI; and
forming a color filter over the doped layer;
wherein the operation of performing the microwave anneal includes forming the doped layer to a predetermined vertical thickness.
2. The method of claim 1 , further comprising forming a dielectric layer conformally over the doped layer.
3. The method of claim 1 , wherein the operation of forming the doped layer comprises doping a p-type dopant or an n-type dopant in a variable concentration profile.
4. The method of claim 1 , wherein the operation of forming the DTI comprises etching the back side of the semiconductive substrate.
5. The method of claim 1 , wherein the operation of forming the doped layer comprises using an ion implantation.
6. A method of manufacturing a back side illuminated (BSI) image sensor, comprising:
receiving a semiconductive substrate;
forming a transistor coupled to a photosensitive element at a front side of the semiconductive substrate;
forming an interconnection coupled to the transistor;
forming a deep trench isolation (DTI) at a back side of the semiconductive substrate;
forming a doped layer conformally inside the DTI and over the semiconductive substrate;
performing a microwave anneal over the doped layer;
filling a conductive material inside the DTI; and
forming a color filter over the doped layer;
wherein the operation of performing the microwave anneal includes forming the doped layer to a predetermined vertical thickness.
7. The method of claim 6 , further comprising forming a polarized dielectric layer conformally over the doped layer.
8. The method of claim 6 , wherein the operation of forming the doped layer comprises using an n-type dopant or a p-type dopant.
9. The method of claim 6 , wherein the operation of forming the doped layer comprises epitaxially growing the doped layer in the DTI and over the back side.
10. The method of claim 6 , wherein the operation of forming the DTI comprises dry etching the back side of the semiconductive substrate.
11. A method of forming a deep trench isolation (DTI) in a back side illuminated (BSI) image sensor, comprising:
receiving a semiconductive substrate;
forming a deep trench at a back side of the semiconductive substrate;
forming a doped layer conformally over the deep trench;
performing low temperature activation to active dopants in the doped layer;
forming a non-transparent material inside the deep trench; and
forming a color filter over the doped layer;
wherein the operation of performing low temperature activation to active the dopants in the doped layer comprises performing a microwave anneal over the back side to active the dopants in the doped layer.
12. The method of claim 11 , further comprising forming a dielectric layer conformally over the doped layer.
13. The method of claim 11 , wherein the operation of forming the doped layer comprises doping a p-type dopants or an n-type dopants in a variable concentration profile.
14. The method of claim 13 , wherein the doped layer comprises the p-type dopants and the n-type dopants.
15. The method of claim 11 , wherein the operation of forming the deep trench comprises etching the back side of the semiconductive substrate.
16. The method of claim 11 , wherein the operation of forming the doped layer comprises using an ion implantation.
17. The method of claim 11 , wherein the operation of forming the doped layer comprises epitaxially growing the doped layer in the DTI and over the back side.
18. The method of claim 11 , wherein the operation of performing the microwave anneal comprises forming the doped layer to a predetermined vertical thickness.