Virtual load store queue having a dynamic dispatch window with a distributed structure

1. An out of order processor, comprising:

a distributed load queue and a distributed store queue that maintain single program sequential semantics while allowing an out of order dispatch of loads and stores across a plurality of cores and memory fragments;

wherein the processor allocates other instructions besides loads and stores beyond the actual physical size limitation of the load/store queue; and

wherein the other instructions can be dispatched and executed even though intervening loads or stores do not have spaces in the load store queue,

wherein each of the plurality of cores within the processor includes a load queue and a store queue and an extension for the respective load queue and store queue for avoiding deadlocks by allocating deadlocked loads or stores in program order from a point of the load or store that causes a deadlock until the load or store queue has free entries available.

2. The processor of claim 1 , wherein a reservation policy for the extension is to reserve an entry for each load or store the respective distributed queue.

3. The processor of claim 1 , wherein upon detection of a deadlock, a miss-prediction and flush at an earliest load or store that deadlocked is implemented.

4. The processor of claim 1 , wherein a continuity window is implemented, where the sum of the un-dispatched loads outside the continuity window should be less than or equal to the number of free unreserved spaces in a particular load queue.

5. The processor of claim 4 , wherein a dynamic load dispatch window is implemented, wherein dynamic load dispatch window sizing is determined such that the sum of the un-dispatched loads outside the continuity window should be less than or equal to the number of free unreserved spaces in the particular load queue.

6. A computer system, comprising:

an out of order processor coupled to a memory, wherein the out of order processor further comprises:

a distributed load queue and a distributed store queue that maintain single program sequential semantics while allowing an out of order dispatch of loads and stores across a plurality of cores and memory fragments;

wherein the processor allocates other instructions besides loads and stores beyond the actual physical size limitation of the load/store queue; and

wherein the other instructions can be dispatched and executed even though intervening loads or stores do not have spaces in the load store queue,

wherein each of the plurality of cores within the processor includes a load queue and a store queue and an extension for the respective load queue and store queue for avoiding deadlocks by allocating deadlocked loads or stores in program order from a point of the load or store that causes a deadlock until the load or store queue has free entries available.

7. The computer system of claim 6 , wherein a reservation policy for the extension is to reserve an entry for each load or store the respective distributed queue.

8. The computer system of claim 6 , wherein upon detection of a deadlock, a miss-prediction and flush at an earliest load or store that deadlocked is implemented.

9. The computer system of claim 6 , wherein a continuity window is implemented, where the sum of the un-dispatched loads outside the continuity window should be less than or equal to the number of free unreserved spaces in a particular load queue.

10. The computer system of claim 9 , wherein a dynamic load dispatch window is implemented, wherein dynamic load dispatch window sizing is determined such that the sum of the un-dispatched loads outside the continuity window should be less than or equal to the number of free unreserved spaces in the particular load queue.

11. An out of order processor, comprising:

a distributed load queue and a distributed store queue that maintain single program sequential semantics while allowing an out of order dispatch of loads and stores across a plurality of cores and memory fragments;

wherein the processor allocates other instructions besides loads and stores beyond the actual physical size limitation of the load/store queue;

wherein the other instructions can be dispatched and executed even though intervening loads or stores do not have spaces in the load store queue;

wherein each of the plurality of cores within the processor includes a load queue and a store queue; and

wherein each of the plurality of cores within the processor includes a load queue and a store queue and an extension for the respective load queue and store queue for avoiding deadlocks by allocating deadlocked loads or stores in program order from a point of the load or store that causes a deadlock until the load or store queue has free entries available.

12. The processor of claim 11 , wherein a reservation policy for the extension is to reserve an entry for each load or store the respective distributed queue.

13. The processor of claim 11 , wherein a continuity window is implemented, where the sum of the un-dispatched loads outside the continuity window should be less than or equal to the number of free unreserved spaces in a particular load queue, and wherein a dynamic load dispatch window is implemented, wherein dynamic load dispatch window sizing is determined such that the sum of the un-dispatched loads outside the continuity window should be less than or equal to the number of free unreserved spaces in the particular load queue.