IP Library › Granted Patent US 9,832,408
Granted Patent B2
US 9,832,408 · App. 14/560,710 · Granted Nov 28, 2017

Imaging sensor and imaging device with column ADC

Inventor: Hironobu Murata (Yokohama, JP)
Assignee: NIKON CORPORATION
H04N5/37455H01L27/1464H04N5/369H04N5/378H04N5/3745
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Quick Facts
Patent No.
US 9,832,408
App. No.
14/560,710
Granted
Nov 28, 2017
Kind
B2
Abstract

An imaging sensor comprising: an imaging chip in which a plurality of pixel are arranged in a matrix; and a signal processing chip that is each provided for one or more pixel columns or one or more pixel rows, has a device that performs signal processing on a pixel signal output from a pixel, and is stacked with the imaging chip is provided. For example, the device that performs signal processing is an A/D converter that converts a pixel signal output from the pixel into a digital signal, and when a pixel signal output from the pixel is converted into a digital signal, at least two or more A/D converters among the A/D converters are controlled in parallel.

Claims (39)

1. An imaging sensor comprising:

an imaging chip having

a pixel unit that has first and second pixel regions that each includes a plurality of pixels,

a readout unit that is provided for each of the first and second pixel regions, and each readout unit reading out signals from pixels of each of the first and second pixel regions, and

a signal line that is provided for each of the first and second pixel regions; and

a signal processing chip above which the imaging chip is stacked, the signal processing chip having

a signal processing unit that is stacked with the pixel unit and has (i) a first signal processing circuit that performs signal processing on a signal from a first pixel of the first pixel region that is read out by the readout unit for the first pixel region and output to the first signal processing circuit via the signal line for the first pixel region, and (ii) a second signal processing circuit that performs signal processing on a signal from a second pixel of the second pixel region that is read out by the readout unit for the second pixel region and output to the second signal processing circuit via the signal line for the second pixel region,

both the first pixel region and the second pixel region being stacked above both the first signal processing circuit and the second signal processing circuit such that both the first pixel region and the second pixel region overlap both the first signal processing circuit and the second signal processing circuit as viewed along a direction parallel to an optical axis of the imaging sensor, and

the first pixel region being connected to only the first signal processing circuit, and the second pixel region being connected to only the second signal processing circuit.

2. The imaging sensor according to claim 1 , wherein

the first signal processing circuit includes a first A/D converter that converts a pixel signal from the first pixel into a digital signal, and

the second signal processing circuit includes a second A/D converter that converts a pixel signal from the second pixel into a digital signal.

3. The imaging sensor according to claim 1 , wherein

the pixel unit and the signal processing unit are connected via a plurality of bumps, and

the bumps are arranged in the first and second pixel regions respectively.

4. The imaging sensor according to claim 1 , wherein

the pixel unit and the signal processing unit are connected via a plurality of bumps, and

the plurality of bumps are arranged at constant intervals.

5. An imaging sensor comprising:

an imaging chip having

a pixel unit that has first and second pixel regions that each includes a plurality of pixels,

a readout unit that is provided for each of the first and second pixel regions, each readout unit reading out signals from pixels of each of the first and second pixel regions, and

a signal line that is provided for each of the first and second pixel regions; and

a signal processing chip above which the imaging chip is stacked, the signal processing chip having

a signal processing unit that is stacked with the pixel unit and has (i) a first signal processing circuit that performs signal processing on a signal from a first pixel of the first pixel region and a signal from a second pixel of the first pixel region, that are read out by the readout unit for the first pixel region and output to the first signal processing circuit via the signal line for the first pixel region, and (ii) a second signal processing circuit that performs signal processing on a signal from a third pixel of the second pixel region and a signal from a fourth pixel of the second pixel region, that are read out by the readout unit for the second pixel region and output to the second signal processing circuit via the signal line for the second pixel region,

both the first pixel region and the second pixel region being stacked above both the first signal processing circuit and the second signal processing circuit such that both the first pixel region and the second pixel region overlap both the first signal processing circuit and the second signal processing circuit as viewed along a direction parallel to an optical axis of the imaging sensor, and

the first pixel region being connected to only the first signal processing circuit, and the second pixel region being connected to only the second signal processing circuit.

6. The imaging sensor according to claim 5 , wherein

the first signal processing circuit includes a first A/D converter that converts the signal from the first pixel and the signal from the second pixel into a digital signal, and

the second signal processing circuit includes a second A/D converter that converts the signal from the third pixel and the signal from the fourth pixel into a digital signal.

7. The imaging sensor according to claim 5 , wherein

the pixel unit and the signal processing unit are connected via a plurality of bumps, and

each bump is arranged in a respective one of the first and second pixel regions.

8. The imaging sensor according to claim 5 , wherein

the pixel unit and the signal processing unit are connected via a plurality of bumps arranged at constant intervals.

9. The imaging sensor according to claim 1 , wherein

the first pixel region is arranged as a first column of pixels, and the second pixel region is arranged as a second column of pixels.

10. The imaging sensor according to claim 5 , wherein

the first pixel region is arranged as a first column of pixels, and the second pixel region is arranged as a second column of pixels.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 19, 2015
From: MURATA, HIRONOBU
To: NIKON CORPORATION
Reel/Frame 034988/0650 →
Priority Claims (1)
JP 2012-131232 · Jun 8, 2012 · national
Continuity (2)
Continuation In Part PCTJP2013003533 · Jun 5, 2013
Related Publication 20150163441A1 · Jun 11, 2015