IP Library Granted Patent US 9,385,104
Granted Patent B2
US 9,385,104 · App. 14/561,572 · Granted Jul 5, 2016

Bonding apparatus

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,385,104
App. No.
14/561,572
Granted
Jul 5, 2016
Kind
B2
Abstract

Provided is a flip-chip bonding apparatus ( 500 ) capable of stacking and bonding a second-layer of the semiconductor chip ( 30 ) onto a first-layer of the semiconductor chip ( 20 ) having first through-silicon vias, the second-layer of the semiconductor chip ( 30 ) having second through-silicon vias at positions corresponding to the first through-silicon vias. The flip-chip bonding apparatus ( 500 ) includes: a double-view camera ( 16 ) configured to take images of the chips ( 20 ) and ( 30 ); and a control unit ( 50 ) having a relative-position detection program ( 53 ) for detecting relative positions of the first-layer of the semiconductor chip ( 20 ) and the second-layer of the semiconductor chip ( 30 ) that are stacked and bonded based on an image of the first through-silicon vias on a surface of the first-layer of the semiconductor chip ( 20 ) taken by the double-view camera ( 16 ) before stacked bonding, and an image of the second through-silicon vias on a surface of the second-layer of the semiconductor chip ( 30 ) taken by the double-view camera ( 16 ) after stacked bonding. This provides accurate connection between through-silicon vias using a simple method.

Claims (22)

1. A bonding apparatus comprising:

a camera configured to take images of semiconductor chips; and

a control unit configured to perform image processing of the images taken by the camera, and configured to perform bonding control of stacking and bonding a second-layer of the semiconductor chips onto a first-layer of the semiconductor chips, the first-layer of the semiconductor chip having a first through-silicon via, the second-layer of the semiconductor chip having a second through-silicon via at positions corresponding to the first through-silicon via, wherein the control unit comprises:

a relative position detecting means configured to detect relative positions of the layers of the semiconductor chips that have been stacked and bonded based on an image of the first through-silicon via on a first surface of the first-layer of the semiconductor chip taken by the camera before stacked bonding, and an image of the second through-silicon via on a first surface of the second-layer of the semiconductor chip taken by the camera after stacked bonding;

wherein the relative positions are represented by one or more of positional displacement of the second-layer of the semiconductor chip in a direction along a reference axis on the first surface of the first-layer of the semiconductor chip, positional displacement of the second-layer of the semiconductor chip in a direction perpendicular to the reference axis, and a rotational angle of the second-layer of the semiconductor chip with respect to the reference axis.

2. The bonding apparatus according to claim 1 , wherein the first-layer of the semiconductor chip and the second-layer of the semiconductor chip are two adjacent layers of the semiconductor chips.

3. The bonding apparatus according to claim 1 , wherein the first-layer of the semiconductor chip is an initial-layer of the semiconductor chips, and the second-layer of the semiconductor chip is a different one of the semiconductor chips that is stacked and bonded on top of the initial-layer of the semiconductor chip.

4. A bonding apparatus comprising:

a camera configured to take images of semiconductor chips; and

a control unit configured to perform image processing of the images taken by the camera, and configured to perform bonding control of stacking and bonding a second-layer of the semiconductor chips onto a first-layer of the semiconductor chips, the first-layer of the semiconductor chip having a first through-silicon via, the second-layer of the semiconductor chip having a second through-silicon via at positions corresponding to the first through-silicon via, wherein the control unit comprises:

a relative position detecting means configured to detect relative positions of the layers of the semiconductor chips that have been stacked and bonded based on an image of the first through-silicon via on a first surface of the first-layer of the semiconductor chip taken by the camera before stacked bonding, and an image of the second through-silicon via on a first surface of the second-layer of the semiconductor chip taken by the camera after stacked bonding;

wherein the control unit comprises

a first imaging means configured to take the image of the first through-silicon via on the first surface of the first-layer of the semiconductor chip using the camera before stacked bonding;

a first bonding means configured to stack and bond the second-layer of the semiconductor chip onto the first-layer of the semiconductor chip by aligning a first alignment mark on the first surface of the first-layer of the semiconductor chip taken by the camera before stacked bonding and a second alignment mark on a second surface of the second-layer of the semiconductor chip taken by the camera before stacked bonding;

a second imaging means configured to take the image of the second through-silicon vias on the first surface of the second-layer of the semiconductor chip using the camera after stacked bonding by the first bonding means; and

an offset setting means configured to detect the relative positions of the layers of the semiconductor chips based on the image of the first through-silicon vias taken by the first imaging means and the image of the second through-silicon vias taken by the second imaging means, and to set the detected relative positions as an amount of offset in stacked bonding.

5. The bonding apparatus according to claim 4 , wherein the control unit comprises:

second bonding means configured to stack and bond the second-layer of the semiconductor chip onto the first-layer of the semiconductor chip by displacing the second-layer of the semiconductor chip by the amount of offset set by the offset setting means from a position at which the first alignment mark and the second alignment mark are aligned;

third imaging means configured to take the image of the second through-silicon vias on the first surface of the second-layer of the semiconductor chip by the camera after stacked bonding by the second bonding means; and

displacement detecting means configured to detect an amount of displacement of the relative positions of the layers of the semiconductor chips based on the image of the first through-silicon vias taken by the first imaging means and the image of the second through-silicon vias taken by the third imaging means.

6. The bonding apparatus according to claim 5 , wherein the control unit comprises:

offset correcting means configured to correct the amount of offset by a predetermined percentage of the amount of displacement when the amount of displacement detected by the displacement detecting means is smaller than a first threshold value and equal to or greater than a second threshold value.

Assignments (2)
MERGER Recorded Dec 4, 2025
From: SHINKAWA LTD.
To: YAMAHA ROBOTICS CO., LTD.
Reel/Frame 073833/0572 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2015
From: TANI, DAISUKE; TAKAHASHI, KOICHI
To: SHINKAWA LTD.
Reel/Frame 034971/0372 →