Semiconductor package
A semiconductor package includes a die pad, wherein a semiconductor die is mounted on the die pad; a plurality of leads comprising a power lead disposed along a peripheral edge of the die pad; at least one connecting bar connecting with the die pad; and a power bar disposed on one side of the connecting bar, wherein the power bar is integrally connected to the power lead. A capacitor is mounted between the power bar and the connecting bar.
1. A semiconductor package, comprising:
a die pad, wherein a bottom surface of the die pad is exposed outside the semiconductor package;
a semiconductor die mounted on the die pad;
a plurality of leads comprising a power lead disposed along a peripheral edge of the die pad;
at least one connecting bar connecting the die pad;
a power bar disposed on one side of the connecting bar, wherein the power bar is integrally connected to the power lead; and
a capacitor comprising a first terminal and a second terminal, wherein the first terminal is electrically connected to the power bar and the second terminal is electrically connected a ground level, wherein the power bar is flush with inner leads of the leads.
2. The semiconductor package according to claim 1 wherein the second terminal is electrically connected to the connecting bar.
3. The semiconductor package according to claim 1 further comprising a downset structure disposed between the power lead and the power bar.
4. The semiconductor package according to claim 1 wherein the second terminal is electrically connected to the die pad.
5. The semiconductor package according to claim 1 further comprising a ground bar integrally connected to the connecting bar.
6. The semiconductor package according to claim 5 wherein the second terminal is electrically connected to the ground bar.
7. The semiconductor package according to claim 5 wherein the ground bar is integrally connected to the die pad with a downset tie bar.
8. The semiconductor package according to claim 5 wherein the power bar is flush with the ground bar.
9. A semiconductor package, comprising:
a die pad;
a semiconductor die mounted on the die pad;
a plurality of leads comprising a power lead disposed along a peripheral edge of the die pad;
at least one connecting bar connecting the die pad;
a power bar disposed on one side of the connecting bar, wherein the power bar is integrally connected to the power lead;
a capacitor comprising a first terminal and a second terminal, wherein the first terminal is electrically connected to the power bar and the second terminal is electrically connected a ground level; and
a ground bar integrally connected to the connecting bar.
10. The semiconductor package according to claim 9 wherein the second terminal is electrically connected to the ground bar.
11. The semiconductor package according to claim 9 wherein the ground bar is integrally connected to the die pad with a downset tie bar.
12. The semiconductor package according to claim 9 wherein the power bar is flush with the ground bar.
13. A semiconductor package, comprising:
a die pad;
a semiconductor die mounted on the die pad;
a plurality of leads comprising a power lead disposed along a peripheral edge of the die pad;
at least one connecting bar connecting the die pad;
a power bar disposed on one side of the connecting bar, wherein the power bar is integrally connected to the power lead;
a capacitor comprising a first terminal and a second terminal, wherein the first terminal is electrically connected to the power bar and the second terminal is electrically connected a ground level; and
a downset structure disposed between the power lead and the power bar, wherein the power lead and the power bar is electrically connected with each other through the downset structure.