IP Library › Granted Patent US 9,203,973
Granted Patent B2
US 9,203,973 · App. 14/567,520 · Granted Dec 1, 2015

Multimode multicarrier modem system and method of communication over the same

Inventors: Peter N. Heller (Somerville, MA); Edmund C. Reiter (Lincoln, MA); Michael A. Tzannes (Lexington, MA)
Assignee: INTEL CORPORATION
H04M11/062H04B1/0067H04L5/20H04L12/2898H04L25/14
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Quick Facts
Patent No.
US 9,203,973
App. No.
14/567,520
Granted
Dec 1, 2015
Kind
B2
Abstract

An alternative approach to coping with the ever increasing demand for faster communications hardware is to design modems that are capable of operating its speeds at a higher data rate than a speed required for a single port of the standard communication rate for that modem. Basically, by utilizing a resource manager, that directs the data in and out of the various portions of the modem in an orderly manner, keeping track of which of the ports is being operated at any given point in time, a standard single port modem can be reconfigured, for example, at an over clocked rate, to manipulate the data input and output of a modem.

Claims (26)

1. A communications device comprising:

a resource manager configured to support a plurality of modes of operation on a plurality of wireless links, wherein:

during a first mode of operation, the communication device is configured to concurrently support a first multicarrier access solution and a wireless communications solution, and

during a second mode of operation, the communication device is configured to concurrently support the first multicarrier access solution and a second, different, wireless communications solution, wherein the first and the second wireless communications solutions use the same FFT (Fast Fourier Transform) computational resources.

2. The communications device of claim 1 , wherein the wireless communications solution and the second, different wireless communications solution are adapted to use two ports.

3. The communications device of claim 1 , further comprising one or more computational engines adapted to be controller by the resource manager.

4. The communications device of claim 1 , further comprising a plurality of memory buffers adapted for reuse by the resource manager.

5. The communications device of claim 1 , further comprising one or more of a memory, coder, decoder, modulator, demodulator, interleaver and de-interleaver.

6. The communications device of claim 1 , wherein one or more portions of the wireless communications device are implemented on an ASIC.

7. The communications device of claim 1 , further comprising a plurality of ports capable of being supported by a computational engine.

8. The communications device of claim 1 , further comprising one or more sub-channels adapted for communication.

9. The communications device of claim 1 , further comprising a memory adapted to be controlled by the resource manager.

10. The communications device of claim 1 , wherein the wireless communications device supports a multi-port standard.

11. The communications device of claim 1 , wherein the resource manager is further adapted to manage addressing and control functionality into and out of one or more functional blocks.

12. The communications device of claim 1 , wherein the resource manager is adapted to divide a memory into a number of buffers.

13. The communications device of claim 1 , wherein the communications device is adapted to communicate over a Digital Subscriber Line (DSL).

14. The communications device of claim 1 , further comprising one or more of a CRC scrambler and an inverse-framer CRC descrambler.

15. The communications device of claim 1 , further comprising one or more of a Reed Solomon coder and a Reed Solomon decoder.

16. The communications device of claim 1 , further comprising one or more of a QAM encoder trellis and a QAM decoder trellis.

17. The communications device of claim 1 , further comprising an equalizer.

18. The communications device of claim 1 , further comprising one or more of a DMT modulator and a DMT demodulator.

19. The communications device of claim 1 , further comprising an equalizer that includes an interpolator and echo canceller and an echo cancellation and time domain equalizer.

20. The communications device of claim 1 , further comprising memory divided into a number of buffers.

21. The communications device of claim 20 , wherein the memory is divided based on frame boundaries.

22. The communications device of claim 20 , wherein the resource manager is further capable of configuring addressing of data read into and data written out of the buffers to respective functional blocks.

23. The communications device of claim 20 , wherein a buffer of the number of buffers is configured as an inplace buffer containing a predetermined number of points.

Continuity (7)
Continuation 13464659 · May 4, 2012
Continuation 12966592 · Dec 13, 2010
Continuation 12685389 · Jan 11, 2010
Continuation 11109646 · Apr 20, 2005
Division 09862492 · May 23, 2001
Provisional Application 60206502 · May 23, 2000
Related Publication 20150163364A1 · Jun 11, 2015