IP Library Granted Patent US 9,491,388
Granted Patent B2
US 9,491,388 · App. 14/578,892 · Granted Nov 8, 2016

Photodetector comprising a pinned photodiode that is formed by an optically sensitive layer and a silicon diode

Inventors: Edward Hartley Sargent (Toronto, CA); Rajsapan Jain (Menlo Park, CA); Igor Constantin Ivanov (Danville, CA); Michael R. Malone (San Jose, CA); Michael Charles Brading (Danville, CA); Hui Tian (Cupertino, CA); Pierre Henri Rene Della Nave (Mountain View, CA); Jess Jan Young Lee (Woodside, CA)
Assignee: InVisage Technologies, Inc.
H04N5/3765H01L27/1461H01L27/1464H04N5/369H04N5/378H01L27/14621
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Quick Facts
Patent No.
US 9,491,388
App. No.
14/578,892
Granted
Nov 8, 2016
Kind
B2
Abstract

In various embodiments, a photodetector includes a semiconductor substrate and a plurality of pixel regions. Each of the plurality of pixel regions comprises an optically sensitive layer over the semiconductor substrate. A pixel circuit is formed for each of the plurality of pixel regions. Each pixel circuit includes a pinned photodiode, a charge store, and a read out circuit for each of the plurality pixel regions. The optically sensitive layer is in electrical communication with a portion of a silicon diode to form the pinned photodiode. A potential difference between two electrodes in communication with the optically sensitive layer associated with a pixel region exhibits a time-dependent bias; a biasing during a first film reset period being different from a biasing during a second integration period.

Claims (18)

1. A photodetector comprising:

a semiconductor substrate;

a plurality of pixel regions, each of the plurality of pixel regions comprising an optically sensitive layer over the semiconductor substrate; and

a pixel circuit for each of the plurality of pixel regions, each pixel circuit comprising a pinned photodiode, a charge store, and a read out circuit for each of the plurality pixel regions, the optically sensitive layer being in electrical communication with a portion of a silicon diode to form the pinned photodiode, a potential difference between two electrodes in communication with the optically sensitive layer associated with a pixel region exhibits a time-dependent bias, a biasing during a first film reset period being different from a biasing during a second integration period;

the photodetector being configured to,

during a first integration time of a first frame, a floating photodetector is to be biased at near 0 V such that a pixel electrode and a common electrode have the same bias voltage, during which period the photodetector will not generate substantial photocurrent, and a readout signal is mainly from dark current from the silicon diode dark current, and

during a second frame integration, the floating photodetector is to be biased to operate in a normal condition, providing photocurrent to the diode node as a current sink or current source, and

first frame signals and second frame signals are to be subtracted to produce a net signal whose value substantially excludes an effect of silicon dark current.

2. A photodetector comprising:

a semiconductor substrate;

a plurality of pixel regions, each of the plurality of pixel regions comprising an optically sensitive layer over the substrate;

a pixel circuit for each of the plurality of pixel regions, each pixel circuit comprising a pinned photodiode, a charge store, and a read out circuit for each pixel region, the optically sensitive layer being in electrical communication with a portion of a silicon diode to form the pinned photodiode; the photodetector, following experiencing annealing at 150° C. or greater for 1 minute or greater, achieves light detection with a signal-to-noise ratio greater than 1 upon illumination by less than or equal to 0.05 lux of visible-wavelength light;

the photodetector being configured to,

during a first integration time of a first frame, a floating photodetector is to be biased at near 0 V such that a pixel electrode and a common electrode have the same bias voltage, during which period the photodetector will not generate substantial photocurrent, and a readout signal is mainly from dark current from the silicon diode dark current, and

during a second frame integration, the floating photodetector is to be biased to operate in a normal condition, providing photocurrent to the diode node as a current sink or current source, and

first frame signals and second frame signals are to be subtracted to produce a net signal whose value substantially excludes an effect of silicon dark current.

3. The photodetector of claim 2 , wherein the pinned photodiode resides in a plane of a silicon CMOS integrated circuit, and wherein an additional electrode resides on top of the optically sensitive layer.

4. The photodetector of claim 2 , further comprising a spectrally-selective filter, the spectrally-selective filter being formed above the photodetector and configured to substantially remove those wavelengths of light that are shorter than 400 nm.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2015
From: SARGENT, EDWARD HARTLEY; JAIN, RAJSAPAN; IVANOV, IGOR CONSTANTIN; MALONE, MICHAEL R.; BRADING, MICHAEL CHARLES; TIAN, HUI; DELLA NAVE, PIERRE HENRI RENE; LEE, JESS JAN YOUNG
To: INVISAGE TECHNOLOGIES, INC.
Reel/Frame 035382/0736 →
Continuity (5)
Continuation 13156235 · Jun 8, 2011
Provisional Application 61352409 · Jun 8, 2010
Provisional Application 61352410 · Jun 8, 2010
Provisional Application 61394600 · Oct 19, 2010
Related Publication 20150208011A1 · Jul 23, 2015