Distributed burst error protection
View Patent ↗A method of protecting digital words traversing multiple data paths is presented. The method identifies a number of bits for a header of a digital word and determines a number of protection bits for the header. A bit value for each of the protection bits is computed, and the computed bit values of the protection bits are transmitted through one or more data paths.
1. A method for protecting digital words with header redundancy comprising:
generating a plurality of identical headers that are each a copy of a header associated with a payload, wherein the identical headers are generated to be identical to each other;
inserting each of the plurality of identical headers at different locations within the payload to form a digital word, wherein a minimum distance between the different locations of the identical headers within the payload is a maximum burst length; and
transmitting the digital word, including the payload and the plurality of identical headers at the different locations within the payload, wherein at least one of the method operations is executed by hardware logic,
wherein the transmitted digital word is received and decoded in a decoding apparatus.
2. The method for protecting digital words with header redundancy of claim 1 , wherein the inserting comprises:
inserting a first identical header of the plurality of identical headers at a beginning of the payload and a second identical header of the plurality of identical headers at an end of the payload.
3. The method for protecting digital words with header redundancy of claim 1 , wherein inserting comprises:
inserting an identical header of the plurality of identical headers at substantially a middle of the payload.
4. The method for protecting digital words with header redundancy of claim 1 , further comprising:
receiving the digital word having a plurality of received headers inserted therein, and
analyzing bits of each received header of the plurality of received headers.
5. The method for protecting digital words with header redundancy of claim 4 , further comprising:
determining a first received header of the plurality of received headers is different than a second received header of the plurality of received headers, based on the analyzing; and
selecting the first received header based on bits of a third received header of the plurality of received headers having a same value as bits of the first received header.
6. The method for protecting digital words with header redundancy of claim 1 , further comprising:
positioning each of the plurality of identical headers at positions in the payload that are the maximum burst length apart from one another.
7. An integrated circuit that protects digital words with header redundancy, the integrated circuit comprising:
logic circuitry that generates a plurality of identical headers associated with a payload, wherein the headers in the plurality of identical headers are generated to be identical to each other;
logic circuitry that inserts each of the plurality of identical headers at different locations within the payload to form a digital word, wherein a minimum distance between the different locations of the identical headers within the payload is a maximum burst length; and
logic circuitry that transmits the digital word,
wherein the transmitted digital word is received and decoded in a decoding apparatus.
8. The integrated circuit of claim 7 , wherein a first identical header of the plurality of identical headers is inserted at a beginning of the payload, and a second identical header of the plurality of identical headers is inserted at an end of the payload.
9. The integrated circuit of claim 7 , wherein an identical header of the plurality of identical headers is inserted at substantially a middle of the payload.
10. The integrated circuit of claim 7 , wherein the different locations of the plurality of identical headers are positioned in the payload at the maximum burst length apart from one another.
11. A system for protecting digital words with header redundancy comprising:
a first device configured to:
generate a plurality of identical headers associated with a payload, wherein the identical headers are generated to be identical to each other;
insert each of the plurality of identical headers at different locations within the payload to form a digital word, wherein a minimum distance between the different locations of the identical headers within the payload is a maximum burst length; and
transmit the digital word, including the payload and the plurality of identical headers at the different locations within the payload; and
a second device configured to:
receive and decode the digital word, including a received payload and a plurality of received headers at the different locations within the received payload; and
analyze bits of the plurality of received headers.
12. The system of claim 11 , wherein the first device is further configured to:
insert a first identical header of the plurality of identical headers at a beginning and a second identical header of the plurality of identical headers at an end of the payload.
13. The system of claim 11 , wherein the first device is further configured to:
insert an identical header of the plurality of identical headers at substantially a middle of the payload.
14. The system of claim 11 , wherein the different locations of the plurality of identical headers are positioned at the maximum burst length apart from one another.
15. The system of claim 11 , wherein the second device is further configured to:
determine that a first received header of the plurality of received headers is different than a second received header of the plurality of received headers; and
select the first received header based on bits of a third received header having a same value as bits of the first received header.