IP Library Granted Patent US 9,276,572
Granted Patent B2
US 9,276,572 · App. 14/599,738 · Granted Mar 1, 2016

Configuration context switcher with a latch

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,276,572
App. No.
14/599,738
Granted
Mar 1, 2016
Kind
B2
Abstract

Some embodiments provide an IC with configuration context switchers. The IC includes several configurable circuits, each of which configurably performs one of several operations at any given time, based on the configuration data set that it receives at that time. The IC includes several storage circuits for storing several configuration data sets for each of the configurable circuits. The IC also includes a context switching interconnect circuit for switchably connecting the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets. The context switcher includes one or more stages for re-timing the data coming from the configuration storage elements. The stages can include interconnect circuitry or storage circuitry. Some embodiments build one of the stages in the configuration data storage elements. Some embodiments encode the configuration data bits and hence utilize a decoder in the context switcher to decode the encoded configuration data.

Claims (29)

1. An integrated circuit (“IC”) comprising:

a configurable circuit for configurably performing one of a plurality of operations based on configuration data;

a plurality of storage circuits for storing a plurality of configuration data sets for the configurable circuit; and

an interconnect circuit for switchably connecting the configurable circuit to different subsets of the plurality of storage circuits to receive different subsets of the plurality of configuration data sets, said interconnect circuit comprising a set of latches for temporarily storing configuration data sets.

2. The integrated circuit of claim 1 , wherein the set of latches is further for receiving a given subset of configuration data sets of the plurality of configuration data sets from a given subset of storage circuits of the plurality of storage circuits and temporarily storing the received given subset of configuration data sets before providing the received given subset of configuration data sets to the configurable circuit.

3. The integrated circuit of claim 1 , wherein the set of latches is further (i) for receiving the different configuration data subsets from the different subsets of storage circuits at different instances in time and (ii) for temporarily storing each of the received subsets of the plurality of configuration data sets before providing the received subsets of the plurality of configuration data sets to the configurable circuit.

4. The integrated circuit of claim 3 , wherein the set of latches comprises:

a first set of master latches and a second set of slave latches, said first set of master latches for receiving the different subsets of the plurality of configuration data sets from the different subsets of the plurality of storage circuits at different instances in time, and for temporarily storing the received subsets of the plurality of configuration data sets before providing the received subsets of the plurality of configuration data sets to the second set of slave latches;

said second set of slave latches for receiving different configuration data sets from the first set of master latches at different instances in time, and for providing each received particular configuration data set to the configurable circuit.

5. The integrated circuit of claim 1 , wherein each configuration data set includes only one logical bit.

6. The integrated circuit of claim 5 , wherein the interconnect circuit supplies each configuration data bit as a single physical bit to the configurable circuit.

7. The integrated circuit of claim 5 , wherein the interconnect circuit supplies each configuration data bit as two complementary physical bits to the configurable circuit.

8. The integrated circuit of claim 1 , wherein each configuration data set includes more than one logical bit.

9. The integrated circuit of claim 1 , wherein the interconnect circuit switchably connects the configurable circuit to different sets of storage circuits to receive different sets of configuration data sets, in order to allow the configurable circuit to reconfigure while the IC is operating.

10. The integrated circuit of claim 1 , wherein each set of storage circuit includes only one storage circuit.

11. The integrated circuit of claim 1 , wherein each set of storage circuits includes more than one storage circuits.

12. The integrated circuit of claim 1 , wherein the set of latches are not clocked latches.

13. The integrated circuit of claim 1 , wherein the storage operation of the set of latches is controlled by the configuration data received and stored by the set of latches.

14. The integrated circuit of claim 13 , wherein the set of latches comprises a set of toggle circuits for

toggling the latches storage operation based on the configuration data received by the set of latches.

15. The integrated circuit of claim 14 , wherein the set of toggle circuits are active only one changing edge of the configuration data.

16. An electronic device comprising:

an integrated circuit (“IC”) comprising:

a configurable circuit for configurably performing one of a plurality of operations based on configuration data;

a plurality of storage circuits for storing a plurality of configuration data sets for the configurable circuit;

an interconnect circuit for switchably connecting the configurable circuit to different portions of the plurality of storage circuits to receive different portions of the plurality of configuration data sets, said interconnect circuit comprising a set of latches for temporarily storing configuration data sets.

17. The electronic device of claim 16 , wherein the set of latches is further for receiving a configuration data set from a set of storage circuits and temporarily storing the received configuration data set before providing the received configuration data set to the configurable circuit.

18. The electronic device of claim 16 , wherein the set of latches is further (i) for receiving different configuration data sets from different sets of storage circuits at different instances in time and (ii) for temporarily storing each received particular configuration data set before providing the received particular configuration data set to the configurable circuit.

19. The electronic device of claim 16 , wherein each configuration data set includes only one logical bit.

Assignments (3)
SECURITY INTEREST Recorded Sep 12, 2025
From: ALTERA CORPORATION
To: BARCLAYS BANK PLC, AS COLLATERAL AGENT
Reel/Frame 073431/0309 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2015
From: TABULA (ASSIGNMENT FOR THE BENEFIT OF CREDITORS), LLC
To: ALTERA CORPORATION
Reel/Frame 036050/0792 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2015
From: TABULA, INC.
To: TABULA (ASSIGNMENT FOR THE BENEFIT OF CREDITORS), LLC
Reel/Frame 035783/0055 →